From owner-svn-src-head@freebsd.org Thu Sep 7 16:12:57 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id E1C23E016F9; Thu, 7 Sep 2017 16:12:57 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id A574072C4A; Thu, 7 Sep 2017 16:12:57 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v87GCuZa024526; Thu, 7 Sep 2017 16:12:56 GMT (envelope-from andrew@FreeBSD.org) Received: (from andrew@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v87GCubB024525; Thu, 7 Sep 2017 16:12:56 GMT (envelope-from andrew@FreeBSD.org) Message-Id: <201709071612.v87GCubB024525@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: andrew set sender to andrew@FreeBSD.org using -f From: Andrew Turner Date: Thu, 7 Sep 2017 16:12:56 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r323273 - head/sys/arm64/include X-SVN-Group: head X-SVN-Commit-Author: andrew X-SVN-Commit-Paths: head/sys/arm64/include X-SVN-Commit-Revision: 323273 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 07 Sep 2017 16:12:58 -0000 Author: andrew Date: Thu Sep 7 16:12:56 2017 New Revision: 323273 URL: https://svnweb.freebsd.org/changeset/base/323273 Log: Fix the value of ID_AA64ISAR1_DPB_SHIFT, the field is bits 3:0. Sponsored by: DARPA, AFRL Modified: head/sys/arm64/include/armreg.h Modified: head/sys/arm64/include/armreg.h ============================================================================== --- head/sys/arm64/include/armreg.h Thu Sep 7 15:46:44 2017 (r323272) +++ head/sys/arm64/include/armreg.h Thu Sep 7 16:12:56 2017 (r323273) @@ -240,7 +240,7 @@ /* ID_AA64ISAR1_EL1 */ #define ID_AA64ISAR1_MASK 0x0000000f -#define ID_AA64ISAR1_DPB_SHIFT 4 +#define ID_AA64ISAR1_DPB_SHIFT 0 #define ID_AA64ISAR1_DPB_MASK (0xf << ID_AA64ISAR1_DPB_SHIFT) #define ID_AA64ISAR1_DPB(x) ((x) & ID_AA64ISAR1_DPB_MASK) #define ID_AA64ISAR1_DPB_NONE (0x0 << ID_AA64ISAR1_DPB_SHIFT)