Date: Sun, 28 Sep 1997 01:58:42 -0500 From: Tony Overfield <tony@dell.com> To: Terry Lambert <tlambert@primenet.com> Cc: hackers@FreeBSD.ORG Subject: Re: INB question Message-ID: <3.0.2.32.19970928015842.006ce080@bugs.us.dell.com> In-Reply-To: <199709191519.IAA07324@usr07.primenet.com> References: <19970919084937.PR22228@uriah.heep.sax.de>
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At 03:19 PM 9/19/97 +0000, Terry Lambert wrote: >> >> With a true plain ISA card? The boot code still uses an inb(0x84) for >> a timing loop, and it seems to get the timing well enough with it. > >This is actually bogus as hell. First, because it's an input, not >an output. I don't see anything wrong with using an input for this. >Second, port 0x84 is the Compaq POST output port, Port 0x84 is an unused DMA page register, just like 0x80, 0x85, 0x86 and others. Each of these unused registers is read/write and should have no effect, except to cause an 8-bit ISA I/O cycle. I can't speak for their BIOS, but using these registers in POST for progress codes or temporary scratch space is common for a BIOS. By the time the system begins to boot, however, they're fair game. >or >it is the EISA "Synchronize Bus Cycle Register" -- reading it only >causes an extended I/O ready cycle to occur on EISA systems, and >is more useful for flushing EISA bus master or DMA. It's not even >support on all EISA systems (ie: HiNT chipsets, which are broken in >other ways). It doesn't matter whether the port exists, the only benefit of the access is that it causes a slow ISA bus cycle, which will happen even if the port doesn't exist. >I think the "correct" timing mechanism is to output a byte to port >0x80. This is the POST code port, and it's what Linux uses. That will work too, but it seems the same to me.
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