Date: Thu, 27 Apr 2000 09:23:07 -0700 (PDT) From: Matthew Dillon <dillon@apollo.backplane.com> To: Luoqi Chen <luoqi@watermarkgroup.com> Cc: bright@wintelcom.net, djb@ifa.au.dk, freebsd-smp@FreeBSD.ORG Subject: Re: hlt instructions and temperature issues Message-ID: <200004271623.JAA05184@apollo.backplane.com> References: <200004271533.e3RFXoI01828@lor.watermarkgroup.com>
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Slight problem: This patch isn't hlt'ing in a legal way.
The hlt instruction must be right after the sti instruction. Intel
guarentees that an sti + hlt combination will halt without taking
an interrupt in the middle. If you put any code whatsoever inbetween
the sti and the hlt then it is possible for the machine to take an
interrupt prior to halting, wakeup a task, and then halt and get no
further wakeups. This will cause a lockup.
-Matt
:No, we don't use hlt instruction on SMP. We could, but I guess nobody
:bothered to work on it. It should be fairly straight forward: prior to
:hlt, lower TPR priority so that this processor is first in line to
:receive an interrupt. If you are interested, you may give the follwing
:patch a try.
:
:-lq
:
:Index: swtch.s
:===================================================================
:RCS file: /home/ncvs/src/sys/i386/i386/swtch.s,v
:retrieving revision 1.91
:diff -u -r1.91 swtch.s
:--- swtch.s 2000/03/29 06:15:38 1.91
:+++ swtch.s 2000/04/27 15:31:11
:@@ -258,9 +258,14 @@
:
: ENTRY(default_halt)
: sti
:-#ifndef SMP
:- hlt /* XXX: until a wakeup IPI */
:+#ifdef SMP
:+#ifdef CHEAP_TPR
:+ movl $0, lapic_tpr
:+#else
:+ andl $~APIC_TPR_PRIO, lapic_tpr
:+#endif /** CHEAP_TPR */
: #endif
:+ hlt
: ret
:
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