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Date: Tue, 9 Jul 2002 09:53:35 -0700 (PDT)
From: Matthew Dillon <dillon@apollo.backplane.com>
Message-Id: <200207091653.g69GrZlw052708@apollo.backplane.com>
To: Peter Wemm <peter@FreeBSD.ORG>, Tor.Egge@cvsup.no.freebsd.org,
	current@FreeBSD.ORG
Subject: Re: [src] cvs commit: src/sys/vm vm_zeroidle.c
References: <20020708230916.B5D4637B4AF@hub.freebsd.org> <200207091610.g69GAawX052365@apollo.backplane.com>
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:         
:	critical_enter();				<<<<<<<<<
:        *CMAP2 = PG_V | PG_RW | phys | PG_A | PG_M;	<<<<<<<<<
:        invltlb_1pg((vm_offset_t)CADDR2);		<<<<<<<<<
:	curthread->td_lazytlb = PCPU_GET(cpumask);	<<<<<<<<<
:	critical_exit();				<<<<<<<<<
:
:...
:
:    Then we mod the scheduler to check td_lazytlb against PCPU_GET(cpumask)
:    when it switches a thread in.  If the bit is not set it clears the TLB
:    and sets the bit.
:
:    Now, obviously the above is all just pseudo code.  We would want to
:    properly abstract the API and fields, but I think it solves the problem
:    quite nicely, at least in concept.
:
:						-Matt

    Another thing we could do is provide a low-level scheduler callback
    in the thread.  So the lazyzero code would set up a function that 
    invalidates just the CMAP entry it uses on switch-in:

    curthread->td_swcallback = pmap_lazyzero_tlbinval;

    void
    pmap_lazyzero_tlbinval(void)
    {
:        invltlb_1pg((vm_offset_t)CADDR2);
    }

    This is even better then my first idea.

						-Matt


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