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Date:      Tue, 27 Jul 1999 17:01:47 -0400
From:      Tom Embt <tom@embt.com>
To:        freebsd-smp@freebsd.org
Subject:   Re: SMP kernel on dual board with single proc? 
Message-ID:  <3.0.3.32.19990727170147.0075e828@mail.embt.com>
In-Reply-To: <19990727105633.C228D1C9E@overcee.netplex.com.au>
References:  <Your message of "Mon, 26 Jul 1999 12:57:08 CST."             <199907261857.MAA20179@mt.sri.com>

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At 06:56 PM 7/27/99 +0800, you wrote:
>Nate Williams wrote:
>> > Is it possible to build & run an SMP kernel on a DP board with only
one CPU
>> > installed?  I know this is kind of a silly thing to do but I was just
>> > wondering if it is possible.
>> 
>> Works fine.  As a matter of fact, I'm sitting in front of one right
>> now.  The second CPU has been sitting next to me for about 5 months, but
>> I never get time to install it, and besides most of my development is
>> done on 2.2.8 which doesn't support SMP..
>
>Yes, but that's not what he asked.  He wanted to know if a SMP kernel worked
>on a SMP motherboard with one CPU, not if a UP kernel works on a 1 cpu SMP 
>motherboard.
>

Correct, I am asking if it can be done with an _SMP_ kernel, I already run
a regular UP kernel on this board no problem (hence this is not a pressing
issue I was just wondering if it could be done).

Panic msg from bootup (copied by hand) :

panic: NO BSP found!
mp_lock = 00000009; cpuid = 0; lapic.id = 00000000
Automatic reboot in 15 seconds - press a key on the console to abort


Hardware:

Abit BP6 dual-Socket 370 mobo (great board, BTW)*
One SL36C Celeron 366 PPGA CPU populating the "CPU #1" socket
In BIOS: MPS version = 1.4

* The BP6 doesn't use any sort of terminator for the empty socket, and will
work with the CPU in either one


Snippet of kernel conf:

machine		"i386"
cpu			"I686_CPU"
ident		"PARANOR-072799a-S"	# <-- CHANGE THIS!!
maxusers	16

options		SMP
options		APIC_IO

options		NCPU=1
options		NBUS=3
options		NAPIC=1
options		NINTR=24


MPTable:


============================================================================
===

MPTable, version 2.0.15

----------------------------------------------------------------------------
---

MP Floating Pointer Structure:

  location:			BIOS
  physical address:		0x000f5b30
  signature:			'_MP_'
  length:			16 bytes
  version:			1.1
  checksum:			0x80
  mode:				Virtual Wire

----------------------------------------------------------------------------
---

MP Config Table Header:

  physical address:		0x000f1400
  signature:			'PCMP'
  base table length:		288
  version:			1.1
  checksum:			0xfc
  OEM ID:			'OEM00000'
  Product ID:			'PROD00000000'
  OEM table pointer:		0x00000000
  OEM table size:		0
  entry count:			29
  local APIC address:		0xfee00000
  extended table length:	0
  extended table checksum:	0

----------------------------------------------------------------------------
---

MP Config Base Table Entries:

--
Processors:	APIC ID	Version	State		Family	Model	Step	Flags
		 0	 0x11	 BSP, usable	 6	 6	 5	 0xfbff
--
Bus:		Bus ID	Type
		 0	 PCI   
		 1	 PCI   
		 2	 ISA   
--
I/O APICs:	APIC ID	Version	State		Address
		 2	 0x11	 usable		 0xfec00000
--
I/O Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN#
		ExtINT	 conforms    conforms	     2	   0	      2	   0
		INT	 conforms    conforms	     2	   1	      2	   1
		INT	 conforms    conforms	     2	   0	      2	   2
		INT	 conforms    conforms	     2	   3	      2	   3
		INT	 conforms    conforms	     2	   4	      2	   4
		INT	 conforms    conforms	     2	   5	      2	   5
		INT	 conforms    conforms	     2	   6	      2	   6
		INT	 conforms    conforms	     2	   7	      2	   7
		INT	active-hi        edge	     2	   8	      2	   8
		INT	 conforms    conforms	     2	   9	      2	   9
		INT	 conforms    conforms	     2	  10	      2	  10
		INT	 conforms    conforms	     2	  11	      2	  11
		INT	 conforms    conforms	     2	  12	      2	  12
		INT	 conforms    conforms	     2	  13	      2	  13
		INT	 conforms    conforms	     2	  14	      2	  14
		INT	 conforms    conforms	     2	  15	      2	  15
		INT	active-lo       level	     0	 7:A	      2	  19
		INT	active-lo       level	     0	 9:A	      2	  19
		INT	active-lo       level	     0	19:A	      2	  18
		INT	active-lo       level	     0	19:B	      2	  18
		INT	active-lo       level	     1	 0:A	      2	  16
		SMI	 conforms    conforms	     2	   0	      2	  23
--
Local Ints:	Type	Polarity    Trigger	Bus ID	 IRQ	APIC ID	PIN#
		ExtINT	 conforms    conforms	     0	 0:A	    255	   0
		NMI	 conforms    conforms	     0	 0:A	    255	   1

----------------------------------------------------------------------------
---

# SMP kernel config file options:


# Required:
options		SMP			# Symmetric MultiProcessor Kernel
options		APIC_IO			# Symmetric (APIC) I/O

# Optional (built-in defaults will work in most cases):
#options		NCPU=1			# number of CPUs
#options		NBUS=3			# number of busses
#options		NAPIC=1			# number of IO APICs
#options		NINTR=24		# number of INTs

============================================================================
===




Shall I assume it is not possible to run an SMP kernel on this system w/o
another CPU?

Thanks,


Tom Embt
tom@embt.com



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