From owner-p4-projects@FreeBSD.ORG Fri Dec 9 18:40:06 2005 Return-Path: X-Original-To: p4-projects@freebsd.org Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id A647F16A422; Fri, 9 Dec 2005 18:40:05 +0000 (GMT) X-Original-To: perforce@freebsd.org Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 69AC516A41F for ; Fri, 9 Dec 2005 18:40:05 +0000 (GMT) (envelope-from imp@freebsd.org) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id C5D2143D5C for ; Fri, 9 Dec 2005 18:40:04 +0000 (GMT) (envelope-from imp@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.13.1/8.13.1) with ESMTP id jB9Ie45O019436 for ; Fri, 9 Dec 2005 18:40:04 GMT (envelope-from imp@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.13.1/8.13.1/Submit) id jB9Ie4mH019433 for perforce@freebsd.org; Fri, 9 Dec 2005 18:40:04 GMT (envelope-from imp@freebsd.org) Date: Fri, 9 Dec 2005 18:40:04 GMT Message-Id: <200512091840.jB9Ie4mH019433@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to imp@freebsd.org using -f From: Warner Losh To: Perforce Change Reviews Cc: Subject: PERFORCE change 87959 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 09 Dec 2005 18:40:06 -0000 http://perforce.freebsd.org/chv.cgi?CH=87959 Change 87959 by imp@imp_Speedy on 2005/12/09 18:39:27 Fix PIOx_OER and PIOx_IFER offsets. Affected files ... .. //depot/projects/arm/src/sys/arm/at91/at91rm92reg.h#5 edit Differences ... ==== //depot/projects/arm/src/sys/arm/at91/at91rm92reg.h#5 (text+ko) ==== @@ -166,10 +166,10 @@ #define PIOA_PER (0x400) /* PIO Enable Register */ #define PIOA_PDR (0x400 + 4) /* PIO Disable Register */ #define PIOA_PSR (0x400 + 8) /* PIO status register */ -#define PIOA_OER (0x400 + 12) /* Output enable register */ +#define PIOA_OER (0x400 + 16) /* Output enable register */ #define PIOA_ODR (0x400 + 20) /* Output disable register */ #define PIOA_OSR (0x400 + 24) /* Output status register */ -#define PIOA_IFER (0x400 + 28) /* Input filter enable register */ +#define PIOA_IFER (0x400 + 32) /* Input filter enable register */ #define PIOA_IFDR (0x400 + 36) /* Input filter disable register */ #define PIOA_IFSR (0x400 + 40) /* Input filter status register */ #define PIOA_SODR (0x400 + 48) /* Set output data register */ @@ -195,10 +195,10 @@ #define PIOB_PER (0x400) /* PIO Enable Register */ #define PIOB_PDR (0x600 + 4) /* PIO Disable Register */ #define PIOB_PSR (0x600 + 8) /* PIO status register */ -#define PIOB_OER (0x600 + 12) /* Output enable register */ +#define PIOB_OER (0x600 + 16) /* Output enable register */ #define PIOB_ODR (0x600 + 20) /* Output disable register */ #define PIOB_OSR (0x600 + 24) /* Output status register */ -#define PIOB_IFER (0x600 + 28) /* Input filter enable register */ +#define PIOB_IFER (0x600 + 32) /* Input filter enable register */ #define PIOB_IFDR (0x600 + 36) /* Input filter disable register */ #define PIOB_IFSR (0x600 + 40) /* Input filter status register */ #define PIOB_SODR (0x600 + 48) /* Set output data register */ @@ -224,10 +224,10 @@ #define PIOC_PER (0x800) /* PIO Enable Register */ #define PIOC_PDR (0x800 + 4) /* PIO Disable Register */ #define PIOC_PSR (0x800 + 8) /* PIO status register */ -#define PIOC_OER (0x800 + 12) /* Output enable register */ +#define PIOC_OER (0x800 + 16) /* Output enable register */ #define PIOC_ODR (0x800 + 20) /* Output disable register */ #define PIOC_OSR (0x800 + 24) /* Output status register */ -#define PIOC_IFER (0x800 + 28) /* Input filter enable register */ +#define PIOC_IFER (0x800 + 32) /* Input filter enable register */ #define PIOC_IFDR (0x800 + 36) /* Input filter disable register */ #define PIOC_IFSR (0x800 + 40) /* Input filter status register */ #define PIOC_SODR (0x800 + 48) /* Set output data register */ @@ -253,10 +253,10 @@ #define PIOD_PER (0xa00) /* PIO Enable Register */ #define PIOD_PDR (0xa00 + 4) /* PIO Disable Register */ #define PIOD_PSR (0xa00 + 8) /* PIO status register */ -#define PIOD_OER (0xa00 + 12) /* Output enable register */ +#define PIOD_OER (0xa00 + 16) /* Output enable register */ #define PIOD_ODR (0xa00 + 20) /* Output disable register */ #define PIOD_OSR (0xa00 + 24) /* Output status register */ -#define PIOD_IFER (0xa00 + 28) /* Input filter enable register */ +#define PIOD_IFER (0xa00 + 32) /* Input filter enable register */ #define PIOD_IFDR (0xa00 + 36) /* Input filter disable register */ #define PIOD_IFSR (0xa00 + 40) /* Input filter status register */ #define PIOD_SODR (0xa00 + 48) /* Set output data register */