Date: Tue, 11 Jul 2006 21:06:20 GMT From: John Baldwin <jhb@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 101296 for review Message-ID: <200607112106.k6BL6KGt004410@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=101296 Change 101296 by jhb@jhb_mutex on 2006/07/11 21:05:23 Drop the attempt at allowing certain IPI's to still be handled when we would otherwise spin with interrupts disabled as the issue it tried to address has been fixed another way. This can be resurrected later if desired. Affected files ... .. //depot/projects/smpng/sys/i386/i386/local_apic.c#42 edit .. //depot/projects/smpng/sys/i386/i386/mp_machdep.c#102 edit .. //depot/projects/smpng/sys/i386/i386/pmap.c#102 edit .. //depot/projects/smpng/sys/i386/include/apicvar.h#21 edit .. //depot/projects/smpng/sys/kern/kern_mutex.c#129 edit Differences ... ==== //depot/projects/smpng/sys/i386/i386/local_apic.c#42 (text+ko) ==== @@ -917,17 +917,9 @@ int lapic_ipi_wait(int delay) { - int x, incr, allow_ipis, done; + int x, incr; /* - * If interrupts are disabled, then hack on the APIC to allow - * safe IPIs to come in while we wait. - */ - allow_ipis = (read_eflags() & PSL_I) == 0; - if (allow_ipis) - APIC_IPI_SPINWAIT_ENTER(); - - /* * Wait delay loops for IPI to be sent. This is highly bogus * since this is sensitive to CPU clock speed. If delay is * -1, we wait forever. @@ -937,17 +929,12 @@ delay = 1; } else incr = 1; - done = 0; for (x = 0; x < delay; x += incr) { - if ((lapic->icr_lo & APIC_DELSTAT_MASK) == APIC_DELSTAT_IDLE) { - done = 1; - break; - } + if ((lapic->icr_lo & APIC_DELSTAT_MASK) == APIC_DELSTAT_IDLE) + return (1); ia32_pause(); } - if (allow_ipis) - APIC_IPI_SPINWAIT_EXIT(); - return (done); + return (0); } void ==== //depot/projects/smpng/sys/i386/i386/mp_machdep.c#102 (text+ko) ==== @@ -1008,10 +1008,8 @@ smp_tlb_addr2 = addr2; atomic_store_rel_int(&smp_tlb_wait, 0); ipi_all_but_self(vector); - APIC_IPI_SPINWAIT_ENTER(); while (smp_tlb_wait < ncpu) ia32_pause(); - APIC_IPI_SPINWAIT_EXIT(); } static void @@ -1047,10 +1045,8 @@ ipi_all_but_self(vector); else ipi_selected(mask, vector); - APIC_IPI_SPINWAIT_ENTER(); while (smp_tlb_wait < ncpu) ia32_pause(); - APIC_IPI_SPINWAIT_EXIT(); } void ==== //depot/projects/smpng/sys/i386/i386/pmap.c#102 (text+ko) ==== @@ -1414,13 +1414,11 @@ (u_int)&pmap->pm_active); atomic_store_rel_int(&lazywait, 0); ipi_selected(mask, IPI_LAZYPMAP); - APIC_IPI_SPINWAIT_ENTER(); while (lazywait == 0) { ia32_pause(); if (--spins == 0) break; } - APIC_IPI_SPINWAIT_EXIT(); } mtx_unlock_spin(&smp_ipi_mtx); if (spins == 0) ==== //depot/projects/smpng/sys/i386/include/apicvar.h#21 (text+ko) ==== @@ -106,19 +106,11 @@ * other deadlocks caused by IPI_STOP. */ -/* - * These interrupt handlers are for IPIs and local interrupts whose handlers - * do not use any spin locks, so they may still be allowed when a spin lock - * is held. - */ -#define APIC_LOCK_SAFE_INTS (APIC_TIMER_INT + 1) - /* Interrupts for local APIC LVT entries other than the timer. */ -#define APIC_LOCAL_INTS APIC_LOCK_SAFE_INTS +#define APIC_LOCAL_INTS 240 #define APIC_ERROR_INT APIC_LOCAL_INTS #define APIC_THERMAL_INT (APIC_LOCAL_INTS + 1) -/* Spin lock safe IPIs. */ #define APIC_IPI_INTS (APIC_LOCAL_INTS + 2) #define IPI_RENDEZVOUS (APIC_IPI_INTS) /* Inter-CPU rendezvous. */ #define IPI_INVLTLB (APIC_IPI_INTS + 1) /* TLB Shootdown IPIs */ @@ -163,21 +155,6 @@ #define APIC_BUS_PCI 2 #define APIC_BUS_MAX APIC_BUS_PCI -#if 0 -#define APIC_IPI_SPINWAIT_ENTER() do { \ - lapic_set_tpr(APIC_LOCK_SAFE_INTS); \ - enable_intr(); \ -} while (0) - -#define APIC_IPI_SPINWAIT_EXIT() do { \ - disable_intr(); \ - lapic_set_tpr(0); \ -} while (0) -#else -#define APIC_IPI_SPINWAIT_ENTER() -#define APIC_IPI_SPINWAIT_EXIT() -#endif - /* * An APIC enumerator is a psuedo bus driver that enumerates APIC's including * CPU's and I/O APIC's. ==== //depot/projects/smpng/sys/kern/kern_mutex.c#129 (text+ko) ==== @@ -60,11 +60,6 @@ #include <sys/turnstile.h> #include <sys/vmmeter.h> -#ifdef __i386__ -#include <machine/frame.h> -#include <machine/intr_machdep.h> -#include <machine/apicvar.h> -#endif #include <machine/atomic.h> #include <machine/bus.h> #include <machine/cpu.h> @@ -606,9 +601,6 @@ { int i = 0, idlespin = 0; struct thread *td; -#ifdef __i386__ - int apic_hack; -#endif if (LOCK_LOG_TEST(&m->mtx_object, opts)) CTR1(KTR_LOCK, "_mtx_lock_spin: %p spinning", m); @@ -620,11 +612,6 @@ /* Give interrupts a chance while we spin. */ spinlock_exit(); -#ifdef __i386__ - apic_hack = (read_eflags() & PSL_I) == 0; - if (apic_hack) - APIC_IPI_SPINWAIT_ENTER(); -#endif while (m->mtx_lock != MTX_UNOWNED) { if (i++ < 10000000) { cpu_spinwait(); @@ -650,10 +637,6 @@ } cpu_spinwait(); } -#ifdef __i386__ - if (apic_hack) - APIC_IPI_SPINWAIT_EXIT(); -#endif spinlock_enter(); }
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