From owner-svn-src-all@FreeBSD.ORG Tue Mar 22 10:29:36 2011 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id BB38D106564A; Tue, 22 Mar 2011 10:29:36 +0000 (UTC) (envelope-from adrian@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id AB30E8FC0C; Tue, 22 Mar 2011 10:29:36 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id p2MATasY054731; Tue, 22 Mar 2011 10:29:36 GMT (envelope-from adrian@svn.freebsd.org) Received: (from adrian@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id p2MATa0X054727; Tue, 22 Mar 2011 10:29:36 GMT (envelope-from adrian@svn.freebsd.org) Message-Id: <201103221029.p2MATa0X054727@svn.freebsd.org> From: Adrian Chadd Date: Tue, 22 Mar 2011 10:29:36 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r219863 - head/sys/dev/ath/ath_hal/ar5416 X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 22 Mar 2011 10:29:36 -0000 Author: adrian Date: Tue Mar 22 10:29:36 2011 New Revision: 219863 URL: http://svn.freebsd.org/changeset/base/219863 Log: Bring over an XPA (external power amplifer) bias fix for the AR9160. This fix modifies the const addac initval array, rather than modifying a local copy. It means that running >1 AR9160 on a board may prove to be unpredictable. The AR5416 init path also does something similar, so supporting >1 AR5416 of different revisions could cause problems. The later fix will be to create a private copy of the Addac data for the AR5416, AR9160 (and AR9100 when it's merged in) and then modify that as needed. Obtained From: Linux ath9k Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416.h head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416.h ============================================================================== --- head/sys/dev/ath/ath_hal/ar5416/ar5416.h Tue Mar 22 07:19:49 2011 (r219862) +++ head/sys/dev/ath/ath_hal/ar5416/ar5416.h Tue Mar 22 10:29:36 2011 (r219863) @@ -235,6 +235,8 @@ extern void ar5416GetTargetPowersLeg(str uint16_t numRates, HAL_BOOL isExtTarget); extern void ar5416InitChainMasks(struct ath_hal *ah); extern void ar5416RestoreChainMask(struct ath_hal *ah); +extern void ar5416EepromSetAddac(struct ath_hal *ah, + const struct ieee80211_channel *chan); /* TX power setup related routines in ar5416_reset.c */ extern void ar5416GetGainBoundariesAndPdadcs(struct ath_hal *ah, Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c ============================================================================== --- head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c Tue Mar 22 07:19:49 2011 (r219862) +++ head/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c Tue Mar 22 10:29:36 2011 (r219863) @@ -474,10 +474,11 @@ ar5416WriteIni(struct ath_hal *ah, const * Write addac shifts */ OS_REG_WRITE(ah, AR_PHY_ADC_SERIAL_CTL, AR_PHY_SEL_EXTERNAL_RADIO); -#if 0 + /* NB: only required for Sowl */ - ar5416EepromSetAddac(ah, chan); -#endif + if (AR_SREV_SOWL(ah)) + ar5416EepromSetAddac(ah, chan); + regWrites = ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_addac, 1, regWrites); OS_REG_WRITE(ah, AR_PHY_ADC_SERIAL_CTL, AR_PHY_SEL_INTERNAL_ADDAC); Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c ============================================================================== --- head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c Tue Mar 22 07:19:49 2011 (r219862) +++ head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c Tue Mar 22 10:29:36 2011 (r219863) @@ -2425,3 +2425,76 @@ ar5416OverrideIni(struct ath_hal *ah, co OS_REG_WRITE(ah, AR_PHY_HEAVY_CLIP_FACTOR_RIFS, val); } } + +struct ini { + uint32_t *data; /* NB: !const */ + int rows, cols; +}; + +/* + * Override XPA bias level based on operating frequency. + * This is a v14 EEPROM specific thing for the AR9160. + */ +void +ar5416EepromSetAddac(struct ath_hal *ah, const struct ieee80211_channel *chan) +{ +#define XPA_LVL_FREQ(cnt) (pModal->xpaBiasLvlFreq[cnt]) + MODAL_EEP_HEADER *pModal; + HAL_EEPROM_v14 *ee = AH_PRIVATE(ah)->ah_eeprom; + struct ar5416eeprom *eep = &ee->ee_base; + uint8_t biaslevel; + + if (! AR_SREV_SOWL(ah)) + return; + + if (EEP_MINOR(ah) < AR5416_EEP_MINOR_VER_7) + return; + + pModal = &(eep->modalHeader[IEEE80211_IS_CHAN_2GHZ(chan)]); + + if (pModal->xpaBiasLvl != 0xff) + biaslevel = pModal->xpaBiasLvl; + else { + uint16_t resetFreqBin, freqBin, freqCount = 0; + CHAN_CENTERS centers; + + ar5416GetChannelCenters(ah, chan, ¢ers); + + resetFreqBin = FREQ2FBIN(centers.synth_center, IEEE80211_IS_CHAN_2GHZ(chan)); + freqBin = XPA_LVL_FREQ(0) & 0xff; + biaslevel = (uint8_t) (XPA_LVL_FREQ(0) >> 14); + + freqCount++; + + while (freqCount < 3) { + if (XPA_LVL_FREQ(freqCount) == 0x0) + break; + + freqBin = XPA_LVL_FREQ(freqCount) & 0xff; + if (resetFreqBin >= freqBin) + biaslevel = (uint8_t)(XPA_LVL_FREQ(freqCount) >> 14); + else + break; + freqCount++; + } + } + + HALDEBUG(ah, HAL_DEBUG_EEPROM, "%s: overriding XPA bias level = %d\n", + __func__, biaslevel); + + /* + * This is a dirty workaround for the const initval data, + * which will upset multiple AR9160's on the same board. + * + * The HAL should likely just have a private copy of the addac + * data per instance. + */ + if (IEEE80211_IS_CHAN_2GHZ(chan)) + HAL_INI_VAL((struct ini *) &AH5416(ah)->ah_ini_addac, 7, 1) = + (HAL_INI_VAL(&AH5416(ah)->ah_ini_addac, 7, 1) & (~0x18)) | biaslevel << 3; + else + HAL_INI_VAL((struct ini *) &AH5416(ah)->ah_ini_addac, 6, 1) = + (HAL_INI_VAL(&AH5416(ah)->ah_ini_addac, 6, 1) & (~0xc0)) | biaslevel << 6; +#undef XPA_LVL_FREQ +} +