From nobody Wed Nov 15 18:12:17 2023 X-Original-To: dev-commits-src-main@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4SVrq54wcRz50ZTP; Wed, 15 Nov 2023 18:12:17 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4SVrq54Spvz4MtG; Wed, 15 Nov 2023 18:12:17 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1700071937; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=wv5zNNV1pOEI1u1S+lVN5SPVjKi+jrZLPJxkKJNF5Sw=; b=u8yfvYEeEMncxLA5OpslKzmC/PSbXAt0WFnAGCB/IgnT9vsA9QbdGigvHSSJgXjl55fo/5 EUILdC1/YrVSOAsi1xbIBM9vx6HHTrOcKCrSjNS8gYkhSoi1Jgk1Vhj9yrfKwT+G/nz0SI SDrug6OHtPwz4BlVHeyqu3VRzBhesT4MVyUMDc2ouTGiEjp5nBWJMGFDyrpYrpb7OrTGbo uVMfxhKHsKQQ5fTJBXkJu41n8CJlLuCeIwK8/EJ9udLrBOIo3vSFppcuQG4GoLRAoLg945 aAvcTfONXOJ8UzeTYKu0lf7jpxfE6rA2EdAkuuEXGPb58XAaL1jgeMRGUDhP/A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1700071937; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=wv5zNNV1pOEI1u1S+lVN5SPVjKi+jrZLPJxkKJNF5Sw=; b=MhS6soWCXUIliWfZysoMttSzIedGO26xBu0oi2dIz/v9USxzJZ1q2DlR0pFmCykC7PYiG+ 3gjV935Wg9kzkrThWc+opcHVNfQMLYyppdJyGb6rJbHVd5+uWCNk1hkrUg3V1D+gK4xmNz MrxxXZWqMGsmyX6y/FSdwNdYLAr8a/kFk9ICJ3wo8VxkeRERET+PmWV+E5SrO3/6HU5VVD uLmPfM7Iveu3CQRQjRvvzrRNm2tV9JvFZTBJo+67PPJo3r6xdsmIgRJHS3uIrNfmL1zeNA k7dwQi58f74I1ljPW0djeijCcWUzRPWYJkH8KCoAQEnEtQErGCT2D4Jv5O5Sww== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1700071937; a=rsa-sha256; cv=none; b=Sj2EGSVN4K1EbqorQbpvA2aWZu70Biw7uqdgOaBiAFHmSlkeVfbfhSWdN6jKgXqWDxGnUQ m581kBhRIlh2Yt3ljzE+wbxxU9/g929OK832DnCYVwzN0xh8fJD8Nfqmf12rgTpZa+OgYL a+hD2nEEfB1dexfVQ/sLAA7rAUtt+ZcOjw4zE0rOogH5KFsXfRSe8Pt2Y2CIX90n6zrNvg j801GUlrjEPfce/ZiDGxY4WTe6F4I/HSPMKRXXsVQdgaOwd016taUU+5+giO9qCfzsHw1b 0EPRazsdyS6BWzWjEXZYln2QjIpN79Cx+C6UUEYydpgvx0ydxzJ/AiiTFaOD1A== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4SVrq53YF6zCDj; Wed, 15 Nov 2023 18:12:17 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.17.1/8.17.1) with ESMTP id 3AFICHEn077371; Wed, 15 Nov 2023 18:12:17 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.17.1/8.17.1/Submit) id 3AFICH9p077368; Wed, 15 Nov 2023 18:12:17 GMT (envelope-from git) Date: Wed, 15 Nov 2023 18:12:17 GMT Message-Id: <202311151812.3AFICH9p077368@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Andrew Turner Subject: git: 7eb26be9c808 - main - arm64: Use adrp + :lo12: to load globals from asm List-Id: Commit messages for the main branch of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-main List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-main@freebsd.org X-BeenThere: dev-commits-src-main@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: andrew X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 7eb26be9c8080686f64fdc0a28e5ae7839bbc82d Auto-Submitted: auto-generated The branch main has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=7eb26be9c8080686f64fdc0a28e5ae7839bbc82d commit 7eb26be9c8080686f64fdc0a28e5ae7839bbc82d Author: Andrew Turner AuthorDate: 2023-11-11 09:27:30 +0000 Commit: Andrew Turner CommitDate: 2023-11-15 18:05:08 +0000 arm64: Use adrp + :lo12: to load globals from asm When loading a global variable we can use a pseudo-instruction similar to "ldr, xn, =global" to load the address of the symbol. As this is unlikely to be supported by a mov instruction a pc-relative load is used, with the absolute address written at the end of the function so it will be loaded. This load can be partially replaced with an adrp instruction. This generates the address, aligned to a 4k boundary, using a pc-relative addition. Because the address is 4k-aligned we then update reading the global variable using a load with the offset of the load the low 12-bits of the global. Arm64 assemblers have :lo12: to support this, e.g. "ldr xn, [xn, :lo12:global]". The only remaining users of "ldr, xn, =global" that I can find are executed from the physical address space the kernel was loaded in and need an address in the kernels virtual address space. Because of this they can't use adrp. Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D42565 --- sys/arm64/arm64/cpufunc_asm.S | 7 ++++--- sys/arm64/arm64/locore.S | 4 ++-- sys/arm64/arm64/support.S | 4 ++-- 3 files changed, 8 insertions(+), 7 deletions(-) diff --git a/sys/arm64/arm64/cpufunc_asm.S b/sys/arm64/arm64/cpufunc_asm.S index 2b2ca6836530..8163e6c3d0d0 100644 --- a/sys/arm64/arm64/cpufunc_asm.S +++ b/sys/arm64/arm64/cpufunc_asm.S @@ -52,11 +52,12 @@ */ .macro cache_handle_range dcop = 0, ic = 0, icop = 0 .if \ic == 0 - ldr x3, =dcache_line_size /* Load the D cache line size */ + adrp x3, dcache_line_size /* Load the D cache line size */ + ldr x3, [x3, :lo12:dcache_line_size] .else - ldr x3, =idcache_line_size /* Load the I & D cache line size */ + adrp x3, idcache_line_size /* Load the I & D cache line size */ + ldr x3, [x3, :lo12:idcache_line_size] .endif - ldr x3, [x3] sub x4, x3, #1 /* Get the address mask */ and x2, x0, x4 /* Get the low bits of the address */ add x1, x1, x2 /* Add these to the size */ diff --git a/sys/arm64/arm64/locore.S b/sys/arm64/arm64/locore.S index d77963d42461..2d4501d4bfea 100644 --- a/sys/arm64/arm64/locore.S +++ b/sys/arm64/arm64/locore.S @@ -227,8 +227,8 @@ mp_virtdone: BTI_J /* Start using the AP boot stack */ - ldr x4, =bootstack - ldr x4, [x4] + adrp x4, bootstack + ldr x4, [x4, :lo12:bootstack] mov sp, x4 #if defined(PERTHREAD_SSP) diff --git a/sys/arm64/arm64/support.S b/sys/arm64/arm64/support.S index f4b35da88638..bb93cfd521e1 100644 --- a/sys/arm64/arm64/support.S +++ b/sys/arm64/arm64/support.S @@ -376,8 +376,8 @@ END(pagezero_simple) ENTRY(pagezero_cache) add x1, x0, #PAGE_SIZE - ldr x2, =dczva_line_size - ldr x2, [x2] + adrp x2, dczva_line_size + ldr x2, [x2, :lo12:dczva_line_size] 1: dc zva, x0