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From: Jung-uk Kim <jkim@FreeBSD.org>
Date: Sat, 26 Mar 2011 02:02:07 +0000 (UTC)
To: cvs-src-old@freebsd.org
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Subject: cvs commit: src/sys/amd64/amd64 identcpu.c initcpu.c
 src/sys/i386/i386 identcpu.c initcpu.c
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jkim        2011-03-26 02:02:07 UTC

  FreeBSD src repository

  Modified files:
    sys/amd64/amd64      identcpu.c initcpu.c 
    sys/i386/i386        identcpu.c initcpu.c 
  Log:
  SVN rev 220018 on 2011-03-26 02:02:07Z by jkim
  
  Improve CPU identifications of various IDT/Centaur/VIA, Rise and Transmeta
  CPUs.  These CPUs need explicit MSR configuration to expose ceratin CPU
  capabilities (e.g., CMPXCHG8B) to work around compatibility issues with
  ancient software.  Unfortunately, Rise mP6 does not set the CX8 bit in CPUID
  and there is no MSR to expose the feature although all mP6 processors are
  capable of CMPXCHG8B according to datasheets I found from the Net.  Clean up
  and simplify VIA PadLock detection while I am in the neighborhood.
  
  Revision  Changes    Path
  1.188     +2 -20     src/sys/amd64/amd64/identcpu.c
  1.61      +22 -49    src/sys/amd64/amd64/initcpu.c
  1.218     +19 -21    src/sys/i386/i386/identcpu.c
  1.70      +102 -62   src/sys/i386/i386/initcpu.c