From owner-svn-src-head@freebsd.org Wed Jun 14 13:34:11 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 5A3B0D8DFD9; Wed, 14 Jun 2017 13:34:11 +0000 (UTC) (envelope-from jhb@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 289DE33AB; Wed, 14 Jun 2017 13:34:11 +0000 (UTC) (envelope-from jhb@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v5EDYA8M094467; Wed, 14 Jun 2017 13:34:10 GMT (envelope-from jhb@FreeBSD.org) Received: (from jhb@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v5EDYAjG094466; Wed, 14 Jun 2017 13:34:10 GMT (envelope-from jhb@FreeBSD.org) Message-Id: <201706141334.v5EDYAjG094466@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: jhb set sender to jhb@FreeBSD.org using -f From: John Baldwin Date: Wed, 14 Jun 2017 13:34:10 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r319942 - head/sys/x86/x86 X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 14 Jun 2017 13:34:11 -0000 Author: jhb Date: Wed Jun 14 13:34:09 2017 New Revision: 319942 URL: https://svnweb.freebsd.org/changeset/base/319942 Log: Don't try to assign interrupts to a CPU on single-CPU systems. All interrupts are routed to the sole CPU in that case implicitly. This is a regression in EARLY_AP_STARTUP. Previously the 'assign_cpu' variable was only set when a multi-CPU system finished booting, so it's value both meant that interrupts could be assigned and that there was more than one CPU. PR: 219882 Reported by: ota@j.email.ne.jp MFC after: 3 days Modified: head/sys/x86/x86/intr_machdep.c Modified: head/sys/x86/x86/intr_machdep.c ============================================================================== --- head/sys/x86/x86/intr_machdep.c Wed Jun 14 13:23:40 2017 (r319941) +++ head/sys/x86/x86/intr_machdep.c Wed Jun 14 13:34:09 2017 (r319942) @@ -312,7 +312,9 @@ intr_assign_cpu(void *arg, int cpu) #ifdef EARLY_AP_STARTUP MPASS(mp_ncpus == 1 || smp_started); - if (cpu != NOCPU) { + + /* Nothing to do if there is only a single CPU. */ + if (mp_ncpus > 1 && cpu != NOCPU) { #else /* * Don't do anything during early boot. We will pick up the @@ -500,6 +502,8 @@ intr_next_cpu(void) #ifdef EARLY_AP_STARTUP MPASS(mp_ncpus == 1 || smp_started); + if (mp_ncpus == 1) + return (PCPU_GET(apic_id)); #else /* Leave all interrupts on the BSP during boot. */ if (!assign_cpu)