Date: Fri, 11 Feb 2000 17:03:56 +0300 From: "Dmitry Chagin" <sdgp@mail.ru> To: "Stefan Esser" <Stefan_Esser@otelo-online.de> Cc: hackers@FreeBSD.ORG Subject: Re[2]: pci_map_mem return 0 Message-ID: <E12JGfs-000AGS-00@f4.mail.ru>
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>On 2000-01-26 21:13 +0800, dmitry@www.asbaikaltv.ru wrote:
>> i am working on a specific dev driver for pci genlock
>> based on Cirrus Logic GD5446 chip.
>> when i try to map the cards memory, pci_map_mem return 0
>>
>> map[0]: type 3, range 32, base e4000000, size 25
>> map[1]: type 1, range 32, base e6000000, size 12
>> strm0: <Stream Labs PCI Genlock on GD5446> rev 0x45 int a irq 12 on >>pci0.11.0
>>
>> but map[0] is for Display Memory Base Address, but type = 3
>> it's not a PCI_MAPMEM type and
>> map[1] for card registers, but type = 1. it's PCI_MAPMEM type
>The PCI code in 3.1 was written by me. In 4.0 it has been much modified
>by the NewBus developers, but the function in question is unchanged.
>Regarding your problem: I do not see what's wrong with the map.
>type 3 == PCI_MAPMEM | PCI_MAPMEMP indicates prefetchable memory, which
>is the display memory, as you wrote.
>type 1 == PCI_MAPMEM indicates non-prefetchable memory (i.e. memory mapped
>registers).
>The same map types are working just fine on my system ...
Hi, thanks for reply.
i decided this problem: GD5446 it's a vga controler, and bios set cmdreg to 0x00200000
i write to func pci_memen(pcicfgregs *cfg) and pci_porten(pcicfgregs *cfg)
this code:
cfg->cmdreg = pci_cfgread(cfg, PCIR_COMMAND, 2); /* re read command register*/
and ok, but much packed to write data to registers (i need 4 pci vga genlock on one workstation) :((
i write some code
void sw_master(u_int8_t bus, u_int8_t slot, u_int8_t func)
{
outl(0xcf8, (1 << 31) | (bus << 16)
| (slot << 11) | (func << 8) | 0x04);
outl(0xcfc, 0x00);
outl(0xcf8, (1 << 31)
| (VGA_MASTER->bus << 16)
| (VGA_MASTER->slot << 11)
| (VGA_MASTER->func << 8) | 0x04);
outl(0xcfc, VGA_MASTER->cmdreg);
}
void sw_slave(u_int8_t bus, u_int8_t slot, u_int8_t func)
{
outl(0xcf8, (1 << 31)
| (VGA_MASTER->bus << 16)
| (VGA_MASTER->slot << 11)
| (VGA_MASTER->func << 8) | 0x04);
outl(0xcfc, 0x00);
outl(0xcf8, (1 << 31) | (bus << 16)
| (slot << 11) | (func << 8) | 0x04);
outl(0xcfc, 0x03);
}
where VGA_MASTER it's a pcicfgregs struct of basic vga adapter.
is it correctly?
thanks, sorry for my bad inglish :)
Dmitry Chagin.
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