Skip site navigation (1)Skip section navigation (2)
Date:      Mon, 25 Sep 2023 11:00:57 GMT
From:      Andrew Turner <andrew@FreeBSD.org>
To:        src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org
Subject:   git: 79a1a19fc25a - stable/13 - Add more arm64 ID registers
Message-ID:  <202309251100.38PB0v7P052916@gitrepo.freebsd.org>

next in thread | raw e-mail | index | archive | help
The branch stable/13 has been updated by andrew:

URL: https://cgit.FreeBSD.org/src/commit/?id=79a1a19fc25a433b13ea85ed65359479360b2130

commit 79a1a19fc25a433b13ea85ed65359479360b2130
Author:     Andrew Turner <andrew@FreeBSD.org>
AuthorDate: 2023-06-02 14:59:46 +0000
Commit:     Andrew Turner <andrew@FreeBSD.org>
CommitDate: 2023-09-25 08:41:16 +0000

    Add more arm64 ID registers
    
    These will be used by bhyve to emulate these registers.
    
    Sponsored by:   Arm Ltd
    
    (cherry picked from commit 4baf5db06ccfdb616abb6a68be99f297f7377bf4)
---
 sys/arm64/include/armreg.h | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h
index f3bfda15e908..baf04695bf41 100644
--- a/sys/arm64/include/armreg.h
+++ b/sys/arm64/include/armreg.h
@@ -476,6 +476,22 @@
 /* ICC_SRE_EL1 */
 #define	ICC_SRE_EL1_SRE		(1U << 0)
 
+/* ID_AA64AFR0_EL1 */
+#define	ID_AA64AFR0_EL1			MRS_REG(ID_AA64AFR0_EL1)
+#define	ID_AA64AFR0_EL1_op0		3
+#define	ID_AA64AFR0_EL1_op1		0
+#define	ID_AA64AFR0_EL1_CRn		0
+#define	ID_AA64AFR0_EL1_CRm		5
+#define	ID_AA64AFR0_EL1_op2		4
+
+/* ID_AA64AFR1_EL1 */
+#define	ID_AA64AFR1_EL1			MRS_REG(ID_AA64AFR1_EL1)
+#define	ID_AA64AFR1_EL1_op0		3
+#define	ID_AA64AFR1_EL1_op1		0
+#define	ID_AA64AFR1_EL1_CRn		0
+#define	ID_AA64AFR1_EL1_CRm		5
+#define	ID_AA64AFR1_EL1_op2		5
+
 /* ID_AA64DFR0_EL1 */
 #define	ID_AA64DFR0_EL1			MRS_REG(ID_AA64DFR0_EL1)
 #define	ID_AA64DFR0_EL1_op0		0x3



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?202309251100.38PB0v7P052916>