Date: Wed, 30 Aug 1995 12:22:06 +0600 (GMT+0600) From: "Serge A. Babkin" <babkin@hq.icb.chel.su> To: hackers@freebsd.org Cc: current@freebsd.org Subject: Digi PC/Xe patch Message-ID: <199508300622.MAA02111@hq.icb.chel.su>
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Hi!
Finally my Digiboard driver can work with PC/Xe cards! It understands two
flags too:
0x01 - alternate layout of pins
0x02 - use the windowed PC/Xe in 64K mode
It seems to work enough stable now.
The diff relative to ALPHA is:
--------------------------- cut here ------------------------------------
*** 1.31 1995/07/13 09:25:09
--- dgb.c 1995/08/16 08:23:58
***************
*** 1,5 ****
/*-
! * dgb.c $Id: dgb.c,v 1.31 1995/07/13 09:25:09 root Exp $
*
* Copyright (C) 1995 by Serge Babkin <babkin@hq.icb.chel.su>
*
--- 1,5 ----
/*-
! * dgb.c $Id: dgb.c,v 1.40 1995/08/16 08:23:00 root Exp root $
*
* Copyright (C) 1995 by Serge Babkin <babkin@hq.icb.chel.su>
*
***************
*** 208,213 ****
--- 208,214 ----
struct dgb_softc {
/* struct board_info */
u_char status; /* status: DISABLED/ENABLED */
+ u_char unit; /* unit number */
u_char type; /* type of card: PCXE, PCXI, PCXEVE */
u_char altpin; /* do we need alternate pin setting ? */
ushort numports; /* number of ports on card */
***************
*** 292,300 ****
};
#ifdef DEBUG
! static int debug=1;
#else
! static int debug=0;
#endif
static int polltimeout=0;
--- 293,301 ----
};
#ifdef DEBUG
! int dgbdebug=1;
#else
! int dgbdebug=0;
#endif
static int polltimeout=0;
***************
*** 310,315 ****
--- 311,317 ----
{
if(sc->type==PCXEVE) {
outb(sc->port+1, FEPWIN|(addr>>13));
+ DPRINT3("dgb%d: switched to window 0x%x\n",sc->unit,addr>>13);
return (addr & 0x1FFF);
} else {
outb(sc->port,FEPMEM);
***************
*** 324,329 ****
--- 326,332 ----
{
if(sc->type==PCXEVE) {
outb(sc->port+1, FEPWIN|(addr>>13));
+ DPRINT3("dgb%d: switched to window 0x%x\n",sc->unit,addr>>13);
return (addr & 0x1FFF);
} else {
outb(sc->port,inb(sc->port)|FEPMEM);
***************
*** 364,372 ****
int addr;
int unit=dev->id_unit;
!
sc->port=dev->id_iobase;
/* left 24 bits only (ISA address) */
sc->pmem=((long)dev->id_maddr & 0xFFFFFF);
--- 367,380 ----
int addr;
int unit=dev->id_unit;
! sc->unit=dev->id_unit;
sc->port=dev->id_iobase;
+ if(dev->id_flags & DGBFLAG_ALTPIN)
+ sc->altpin=1;
+ else
+ sc->altpin=0;
+
/* left 24 bits only (ISA address) */
sc->pmem=((long)dev->id_maddr & 0xFFFFFF);
***************
*** 429,435 ****
sc->mem_seg=0xF000;
! if(( v&0xC0 )==0) {
win_size=0x10000;
printf("dgb%d: PC/Xe 64K\n",dev->id_unit);
sc->type=PCXE;
--- 437,443 ----
sc->mem_seg=0xF000;
! if(dev->id_flags==DGBFLAG_NOWIN || ( v&0xC0 )==0) {
win_size=0x10000;
printf("dgb%d: PC/Xe 64K\n",dev->id_unit);
sc->type=PCXE;
***************
*** 530,536 ****
/* for PCXEVE set up interrupt and base address */
if(sc->type==PCXEVE) {
! t=(((u_long)sc->pmem>>8) & 0xFFE0);
/* IRQ isn't used */
#if 0
--- 538,544 ----
/* for PCXEVE set up interrupt and base address */
if(sc->type==PCXEVE) {
! t=(((u_long)sc->pmem>>8) & 0xFFE0) | 0x10 /* enable windowing */;
/* IRQ isn't used */
#if 0
***************
*** 565,586 ****
outb(sc->port+2,t & 0xFF);
outb(sc->port+3,t>>8);
}
! outb(sc->port, FEPRST|FEPMEM); DELAY(1);
! for(i=0; (inb(sc->port) & FEPMASK) != (FEPRST|FEPMEM) ; i++) {
! if(i>10000) {
! printf("dgb%d: 2nd reset failed\n",dev->id_unit);
! sc->status=DISABLED;
! hidewin(sc);
! return 0;
}
- DELAY(1);
- }
! DPRINT3("dgb%d: got memory after %d us\n",unit,i);
mem=sc->vmem;
--- 573,600 ----
outb(sc->port+2,t & 0xFF);
outb(sc->port+3,t>>8);
+ } else if(sc->type==PCXE) {
+ t=(((u_long)sc->pmem>>8) & 0xFFE0) /* disable windowing */;
+ outb(sc->port+2,t & 0xFF);
+ outb(sc->port+3,t>>8);
}
! if(sc->type==PCXI || sc->type==PCXE) {
! outb(sc->port, FEPRST|FEPMEM); DELAY(1);
! for(i=0; (inb(sc->port) & FEPMASK) != (FEPRST|FEPMEM) ; i++) {
! if(i>10000) {
! printf("dgb%d: 2nd reset failed\n",dev->id_unit);
! sc->status=DISABLED;
! hidewin(sc);
! return 0;
! }
! DELAY(1);
}
! DPRINT3("dgb%d: got memory after %d us\n",unit,i);
! }
mem=sc->vmem;
***************
*** 671,683 ****
}
if(sc->type==PCXEVE) {
! ptr= mem+setinitwin(sc,BIOSCODE);
for(i=0; i<pcxx_nbios; i++)
*ptr++ = pcxx_bios[i];
outb(sc->port,FEPCLR);
addr=setwin(sc,MISCGLOBAL);
for(i=0; i<200000; i++) {
--- 685,728 ----
}
if(sc->type==PCXEVE) {
! /* set window 7 */
! outb(sc->port+1,0xFF);
!
! ptr= mem+(BIOSCODE & 0x1FFF);
for(i=0; i<pcxx_nbios; i++)
*ptr++ = pcxx_bios[i];
+ ptr= mem+(BIOSCODE & 0x1FFF);
+
+ nfails=0;
+ for(i=0; i<pcxx_nbios; i++, ptr++)
+ if( *ptr != pcxx_bios[i] ) {
+ DPRINT5("dgb%d: wrong code in BIOS at addr 0x%x : \
+ 0x%x instead of 0x%x\n", unit, ptr-(mem+addr), *ptr, pcxx_bios[i] );
+
+ if(++nfails>=5) {
+ printf("dgb%d: 4th memory test (BIOS load) fails\n",unit);
+ break;
+ }
+ }
+
outb(sc->port,FEPCLR);
+ setwin(sc,0);
+
+ for(i=0; (inb(sc->port) & FEPMASK) != FEPCLR ; i++) {
+ if(i>10000) {
+ printf("dgb%d: BIOS start failed\n",dev->id_unit);
+ sc->status=DISABLED;
+ hidewin(sc);
+ return 0;
+ }
+ DELAY(1);
+ }
+
+ DPRINT3("dgb%d: reset dropped after %d us\n",unit,i);
+
addr=setwin(sc,MISCGLOBAL);
for(i=0; i<200000; i++) {
***************
*** 1089,1100 ****
s=spltty();
port->closing=1;
- port->used=0;
linesw[tp->t_line].l_close(tp,flag);
dgb_drain_or_flush(port);
dgbhardclose(port);
ttyclose(tp);
port->closing=0; wakeup(&port->closing);
splx(s);
--- 1134,1145 ----
s=spltty();
port->closing=1;
linesw[tp->t_line].l_close(tp,flag);
dgb_drain_or_flush(port);
dgbhardclose(port);
ttyclose(tp);
port->closing=0; wakeup(&port->closing);
+ port->used=0;
splx(s);
***************
*** 1488,1503 ****
dt->c_ospeed = tp->t_ospeed;
}
if(cmd==TIOCSETAW || cmd==TIOCSETAF)
port->mustdrain=1;
error = linesw[tp->t_line].l_ioctl(tp, cmd, data, flag, p);
- port->mustdrain=0;
-
if (error >= 0)
return error;
error = ttioctl(tp, cmd, data, flag);
if (error >= 0)
return error;
s = spltty();
--- 1533,1561 ----
dt->c_ospeed = tp->t_ospeed;
}
+ if(cmd==TIOCSTOP) {
+ setwin(sc,0);
+ fepcmd(port, PAUSETX, 0, 0, 0, 0);
+ hidewin(sc);
+ return 0;
+ } else if(cmd==TIOCSTART) {
+ setwin(sc,0);
+ fepcmd(port, RESUMETX, 0, 0, 0, 0);
+ hidewin(sc);
+ return 0;
+ }
+
if(cmd==TIOCSETAW || cmd==TIOCSETAF)
port->mustdrain=1;
error = linesw[tp->t_line].l_ioctl(tp, cmd, data, flag, p);
if (error >= 0)
return error;
error = ttioctl(tp, cmd, data, flag);
+
+ port->mustdrain=0;
+
if (error >= 0)
return error;
s = spltty();
***************
*** 1703,1709 ****
tail=bc->tout;
head=bc->tin;
! while(tail!=head && tail!=lasttail) {
DPRINT5("dgb%d: port %d: flush: head=%d tail=%d\n",
port->unit, port->pnum, head, tail);
--- 1761,1767 ----
tail=bc->tout;
head=bc->tin;
! while(tail!=head /* && tail!=lasttail */ ) {
DPRINT5("dgb%d: port %d: flush: head=%d tail=%d\n",
port->unit, port->pnum, head, tail);
*** 1.4 1995/07/13 08:07:46
--- dgreg.h 1995/08/10 02:17:47
***************
*** 1,5 ****
/*-
! * dgreg.h $Id: dgreg.h,v 1.4 1995/07/13 08:07:46 root Exp $
*
* Copyright (C) 1995 by Serge Babkin <babkin@hq.icb.chel.su>
*
--- 1,5 ----
/*-
! * dgreg.h $Id: dgreg.h,v 1.6 1995/07/26 08:51:42 root Exp root $
*
* Copyright (C) 1995 by Serge Babkin <babkin@hq.icb.chel.su>
*
***************
*** 22,28 ****
* babkin@hq.icb.chel.su
*/
! /* #define DEBUG */
#define MAX_DGB_PORTS 32
--- 22,28 ----
* babkin@hq.icb.chel.su
*/
! #define DEBUG
#define MAX_DGB_PORTS 32
***************
*** 344,357 ****
volatile struct global_data *mailbox;
};
/* debugging printout */
#ifdef DEBUG
! # define DPRINT1(a1) (debug ? printf(a1) : 0)
! # define DPRINT2(a1,a2) (debug ? printf(a1,a2) : 0)
! # define DPRINT3(a1,a2,a3) (debug ? printf(a1,a2,a3) : 0)
! # define DPRINT4(a1,a2,a3,a4) (debug ? printf(a1,a2,a3,a4) : 0)
! # define DPRINT5(a1,a2,a3,a4,a5) (debug ? printf(a1,a2,a3,a4,a5) : 0)
#else
# define DPRINT1(a1)
# define DPRINT2(a1,a2)
--- 344,362 ----
volatile struct global_data *mailbox;
};
+ /* flags for configuring */
+
+ #define DGBFLAG_ALTPIN 0x0001 /* chande DCD and DCD */
+ #define DGBFLAG_NOWIN 0x0002 /* use windowed PC/Xe as non-windowed */
+
/* debugging printout */
#ifdef DEBUG
! # define DPRINT1(a1) (dgbdebug ? printf(a1) : 0)
! # define DPRINT2(a1,a2) (dgbdebug ? printf(a1,a2) : 0)
! # define DPRINT3(a1,a2,a3) (dgbdebug ? printf(a1,a2,a3) : 0)
! # define DPRINT4(a1,a2,a3,a4) (dgbdebug ? printf(a1,a2,a3,a4) : 0)
! # define DPRINT5(a1,a2,a3,a4,a5) (dgbdebug ? printf(a1,a2,a3,a4,a5) : 0)
#else
# define DPRINT1(a1)
# define DPRINT2(a1,a2)
--------------------------- cut here ------------------------------------
Serge Babkin
! (babkin@hq.icb.chel.su)
! Headquarter of Joint Stock Commercial Bank "Chelindbank"
! Chelyabinsk, Russia
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