From owner-svn-src-head@FreeBSD.ORG Wed Jul 23 15:53:30 2014 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 9D932C14; Wed, 23 Jul 2014 15:53:30 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 702C02C17; Wed, 23 Jul 2014 15:53:30 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.8/8.14.8) with ESMTP id s6NFrU6F030177; Wed, 23 Jul 2014 15:53:30 GMT (envelope-from royger@svn.freebsd.org) Received: (from royger@localhost) by svn.freebsd.org (8.14.8/8.14.8/Submit) id s6NFrTeJ030173; Wed, 23 Jul 2014 15:53:29 GMT (envelope-from royger@svn.freebsd.org) Message-Id: <201407231553.s6NFrTeJ030173@svn.freebsd.org> From: Roger Pau Monné Date: Wed, 23 Jul 2014 15:53:29 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r269017 - in head/sys: amd64/acpica amd64/amd64 boot/i386/libi386 X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 23 Jul 2014 15:53:30 -0000 Author: royger Date: Wed Jul 23 15:53:29 2014 New Revision: 269017 URL: http://svnweb.freebsd.org/changeset/base/269017 Log: don't set CR4 PSE bit on amd64 Setting PSE together with PAE or in long mode just makes the PSE bit completely ignored, so don't set it. Sponsored by: Citrix Systems R&D Reviewed by: kib Modified: head/sys/amd64/acpica/acpi_wakecode.S head/sys/amd64/amd64/mpboot.S head/sys/amd64/amd64/pmap.c head/sys/boot/i386/libi386/amd64_tramp.S Modified: head/sys/amd64/acpica/acpi_wakecode.S ============================================================================== --- head/sys/amd64/acpica/acpi_wakecode.S Wed Jul 23 15:12:17 2014 (r269016) +++ head/sys/amd64/acpica/acpi_wakecode.S Wed Jul 23 15:53:29 2014 (r269017) @@ -148,9 +148,9 @@ wakeup_32: mov $bootdata32 - bootgdt, %eax mov %ax, %ds - /* Turn on the PAE and PSE bits for when paging is enabled */ + /* Turn on the PAE bit for when paging is enabled */ mov %cr4, %eax - orl $(CR4_PAE | CR4_PSE), %eax + orl $CR4_PAE, %eax mov %eax, %cr4 /* Modified: head/sys/amd64/amd64/mpboot.S ============================================================================== --- head/sys/amd64/amd64/mpboot.S Wed Jul 23 15:12:17 2014 (r269016) +++ head/sys/amd64/amd64/mpboot.S Wed Jul 23 15:53:29 2014 (r269017) @@ -90,9 +90,9 @@ protmode: mov $bootdata-gdt, %eax mov %ax, %ds - /* Turn on the PAE, PSE and PGE bits for when paging is enabled */ + /* Turn on the PAE bit for when paging is enabled */ mov %cr4, %eax - orl $(CR4_PAE | CR4_PSE), %eax + orl $CR4_PAE, %eax mov %eax, %cr4 /* Modified: head/sys/amd64/amd64/pmap.c ============================================================================== --- head/sys/amd64/amd64/pmap.c Wed Jul 23 15:12:17 2014 (r269016) +++ head/sys/amd64/amd64/pmap.c Wed Jul 23 15:53:29 2014 (r269017) @@ -831,7 +831,7 @@ pmap_bootstrap(vm_paddr_t *firstaddr) /* XXX do %cr0 as well */ - load_cr4(rcr4() | CR4_PGE | CR4_PSE); + load_cr4(rcr4() | CR4_PGE); load_cr3(KPML4phys); if (cpu_stdext_feature & CPUID_STDEXT_SMEP) load_cr4(rcr4() | CR4_SMEP); Modified: head/sys/boot/i386/libi386/amd64_tramp.S ============================================================================== --- head/sys/boot/i386/libi386/amd64_tramp.S Wed Jul 23 15:12:17 2014 (r269016) +++ head/sys/boot/i386/libi386/amd64_tramp.S Wed Jul 23 15:53:29 2014 (r269017) @@ -84,7 +84,7 @@ amd64_tramp: /* Turn on PAE */ movl %cr4, %eax - orl $(CR4_PAE | CR4_PSE), %eax + orl $CR4_PAE, %eax movl %eax, %cr4 /* Set %cr3 for PT4 */