Date: Fri, 6 Aug 2021 12:51:18 GMT From: Andrew Turner <andrew@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org Subject: git: 41a3f6bb9d81 - stable/13 - Fix the name of the arm64 SCTLR_E0E register Message-ID: <202108061251.176CpIEF017148@gitrepo.freebsd.org>
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The branch stable/13 has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=41a3f6bb9d81d26afa8d0166840b4ae01899fba5 commit 41a3f6bb9d81d26afa8d0166840b4ae01899fba5 Author: Andrew Turner <andrew@FreeBSD.org> AuthorDate: 2021-07-07 23:12:50 +0000 Commit: Andrew Turner <andrew@FreeBSD.org> CommitDate: 2021-08-05 20:50:19 +0000 Fix the name of the arm64 SCTLR_E0E register The character between the E's was the letter O, however in the Arm Documentation and XML the character is the number 0 (zero). Sponsored by: The FreeBSD Foundation (cherry picked from commit c0edde3021900b80fec4e6360d97ba9d9e50d4fd) --- sys/arm64/arm64/locore.S | 2 +- sys/arm64/include/armreg.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/sys/arm64/arm64/locore.S b/sys/arm64/arm64/locore.S index 48dd794116cd..50b064ab391a 100644 --- a/sys/arm64/arm64/locore.S +++ b/sys/arm64/arm64/locore.S @@ -748,7 +748,7 @@ sctlr_set: SCTLR_M | SCTLR_CP15BEN) sctlr_clear: /* Bits to clear */ - .quad (SCTLR_EE | SCTLR_EOE | SCTLR_IESB | SCTLR_WXN | SCTLR_UMA | \ + .quad (SCTLR_EE | SCTLR_E0E | SCTLR_IESB | SCTLR_WXN | SCTLR_UMA | \ SCTLR_ITD | SCTLR_A) LEND(start_mmu) diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h index d22da16ffc42..ba9345c036f9 100644 --- a/sys/arm64/include/armreg.h +++ b/sys/arm64/include/armreg.h @@ -830,7 +830,7 @@ #define SCTLR_IESB 0x00200000 /* ARMv8.2 */ /* Bit 22 is reserved */ #define SCTLR_SPAN 0x00800000 /* ARMv8.1 */ -#define SCTLR_EOE 0x01000000 +#define SCTLR_E0E 0x01000000 #define SCTLR_EE 0x02000000 #define SCTLR_UCI 0x04000000 #define SCTLR_EnDA 0x08000000 /* ARMv8.3 */
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