From owner-svn-src-head@freebsd.org Tue Jul 17 11:47:57 2018 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 82D83103BFC9; Tue, 17 Jul 2018 11:47:57 +0000 (UTC) (envelope-from hselasky@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 35465853A3; Tue, 17 Jul 2018 11:47:57 +0000 (UTC) (envelope-from hselasky@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 17C0E2E46; Tue, 17 Jul 2018 11:47:57 +0000 (UTC) (envelope-from hselasky@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w6HBluTO091553; Tue, 17 Jul 2018 11:47:56 GMT (envelope-from hselasky@FreeBSD.org) Received: (from hselasky@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w6HBluFJ091552; Tue, 17 Jul 2018 11:47:56 GMT (envelope-from hselasky@FreeBSD.org) Message-Id: <201807171147.w6HBluFJ091552@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: hselasky set sender to hselasky@FreeBSD.org using -f From: Hans Petter Selasky Date: Tue, 17 Jul 2018 11:47:56 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r336410 - head/sys/dev/mlx5/mlx5_core X-SVN-Group: head X-SVN-Commit-Author: hselasky X-SVN-Commit-Paths: head/sys/dev/mlx5/mlx5_core X-SVN-Commit-Revision: 336410 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 17 Jul 2018 11:47:57 -0000 Author: hselasky Date: Tue Jul 17 11:47:56 2018 New Revision: 336410 URL: https://svnweb.freebsd.org/changeset/base/336410 Log: Add module parameter to limit number of MSIX EQ vectors in mlx5en(4). For setups having a large amount of PCI devices, it makes sense to limit the number of MSIX vectors per PCI device, in order to avoid running out of IRQ vectors. MFC after: 1 week Sponsored by: Mellanox Technologies Modified: head/sys/dev/mlx5/mlx5_core/mlx5_main.c Modified: head/sys/dev/mlx5/mlx5_core/mlx5_main.c ============================================================================== --- head/sys/dev/mlx5/mlx5_core/mlx5_main.c Tue Jul 17 11:44:04 2018 (r336409) +++ head/sys/dev/mlx5/mlx5_core/mlx5_main.c Tue Jul 17 11:47:56 2018 (r336410) @@ -61,6 +61,10 @@ static int prof_sel = MLX5_DEFAULT_PROF; module_param_named(prof_sel, prof_sel, int, 0444); MODULE_PARM_DESC(prof_sel, "profile selector. Valid range 0 - 2"); +static int mlx5_core_msix_eqvec; +module_param_named(msix_eqvec, mlx5_core_msix_eqvec, int, 0644); +MODULE_PARM_DESC(msix_eqvec, "Maximum number of MSIX event queue vectors"); + #define NUMA_NO_NODE -1 static LIST_HEAD(intf_list); @@ -239,11 +243,15 @@ static int mlx5_enable_msix(struct mlx5_core_dev *dev) struct mlx5_priv *priv = &dev->priv; struct mlx5_eq_table *table = &priv->eq_table; int num_eqs = 1 << MLX5_CAP_GEN(dev, log_max_eq); - int nvec; + int limit = mlx5_core_msix_eqvec; + int nvec = MLX5_EQ_VEC_COMP_BASE; int i; - nvec = MLX5_CAP_GEN(dev, num_ports) * num_online_cpus() + - MLX5_EQ_VEC_COMP_BASE; + if (limit > 0) + nvec += limit; + else + nvec += MLX5_CAP_GEN(dev, num_ports) * num_online_cpus(); + nvec = min_t(int, nvec, num_eqs); if (nvec <= MLX5_EQ_VEC_COMP_BASE) return -ENOMEM;