From owner-svn-src-head@freebsd.org Tue Jan 30 15:53:11 2018 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id D4411ED22D1; Tue, 30 Jan 2018 15:53:10 +0000 (UTC) (envelope-from nwhitehorn@freebsd.org) Received: from d.mail.sonic.net (d.mail.sonic.net [64.142.111.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 2D9E17318F; Tue, 30 Jan 2018 15:53:09 +0000 (UTC) (envelope-from nwhitehorn@freebsd.org) Received: from comporellon.tachypleus.net (cpe-75-82-218-62.socal.res.rr.com [75.82.218.62]) (authenticated bits=0) by d.mail.sonic.net (8.15.1/8.15.1) with ESMTPSA id w0UFqtYK002799 (version=TLSv1.2 cipher=DHE-RSA-AES128-SHA bits=128 verify=NOT); Tue, 30 Jan 2018 07:52:57 -0800 Subject: Re: svn commit: r328537 - in head/sys/powerpc: aim powernv To: Wojciech Macek Cc: Wojciech Macek , src-committers , svn-src-all@freebsd.org, svn-src-head@freebsd.org, Patryk Duda References: <201801290927.w0T9R2ot008700@repo.freebsd.org> <2b1dc9be-493e-57fb-d012-0af52dc7475b@freebsd.org> From: Nathan Whitehorn Message-ID: <1aeae6a0-dcc6-0c67-7ce0-30aadb02dc72@freebsd.org> Date: Tue, 30 Jan 2018 07:52:55 -0800 User-Agent: Mozilla/5.0 (X11; FreeBSD amd64; rv:52.0) Gecko/20100101 Thunderbird/52.6.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US X-Sonic-CAuth: UmFuZG9tSVZnH4f/7MuLS1F3N4qQcK8vHl+Sfu8hOkERX7n8tDFtbYnZn8C0l/r9la3Me6c6X900xbplHaDKkAkZRWQ1Lp4rpirFtFsfi48= X-Sonic-ID: C;oNkso9UF6BGjUxtCsE207w== M;7GIppNUF6BGjUxtCsE207w== X-Spam-Flag: No X-Sonic-Spam-Details: 1.6/5.0 by cerberusd X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 30 Jan 2018 15:53:11 -0000 On 01/30/18 01:04, Wojciech Macek wrote: > The LPCR register must be set very early. The best is to do it in > cpudep_bootstrap as this is the first function being run on the AP > after start. > As soon as the AP completes pmap_cpu_bootstrap, we must guarantee that > DSI exceptions are working fine. We can't do this with LPCR set > incorrectly, this it contains a base addres of an exception table. Hmm, yes. I had forgotten this ran after pmap_cpu_bootstrap(). Thanks for the explanation! > The code from powernv_smp_ap_init was moved to attach, as we don't set > LPCR twice during AP startup - it's not an error of course, but I like > to have this in one place only. > > I can revert this patch if you insist, but to fix non-powernv boards > we can just add "if (mfmsr() & PSL_HV)" check to early_bootstrap. What > do you think? Let's just add the PSL_HV check. We could add another platform_early() method, but I don't see much point in it here. -Nathan > > Regards, > Wojtek > > 2018-01-29 16:46 GMT+01:00 Nathan Whitehorn >: > > Can you explain why this is necessary? Both functions are run in > the same context and this way of doing things breaks important > abstraction barriers. > > Since it also breaks booting on pHyp systems, I would appreciate > it if you could revert this pending review. > -Nathan > > > On 01/29/18 01:27, Wojciech Macek wrote: > > Author: wma > Date: Mon Jan 29 09:27:02 2018 > New Revision: 328537 > URL: https://svnweb.freebsd.org/changeset/base/328537 > > > Log: >    PowerNV: move LPCR and LPID altering to > cpudep_ap_early_bootstrap >       It turns out that under some circumstances we can get > DSI or DSE before we set >    LPCR and LPID so we should set it as early as possible. >       Authored by:           Patryk Duda > >    Submitted by:          Wojciech Macek > >    Obtained from:         Semihalf >    Sponsored by:          IBM, QCM Technologies > > Modified: >    head/sys/powerpc/aim/mp_cpudep.c >    head/sys/powerpc/powernv/platform_powernv.c > > Modified: head/sys/powerpc/aim/mp_cpudep.c > ============================================================================== > --- head/sys/powerpc/aim/mp_cpudep.c    Mon Jan 29 09:24:28 > 2018        (r328536) > +++ head/sys/powerpc/aim/mp_cpudep.c    Mon Jan 29 09:27:02 > 2018        (r328537) > @@ -64,9 +64,6 @@ cpudep_ap_early_bootstrap(void) >         register_t reg; >   #endif >   -     __asm __volatile("mtsprg 0, %0" :: "r"(ap_pcpu)); > -       powerpc_sync(); > - >         switch (mfpvr() >> 16) { >         case IBM970: >         case IBM970FX: > @@ -86,7 +83,20 @@ cpudep_ap_early_bootstrap(void) >   #endif >                 powerpc_sync(); >                 break; > +       case IBMPOWER8: > +       case IBMPOWER8E: > +               isync(); > +               /* Direct interrupts to SRR instead of HSRR > and reset LPCR otherwise */ > +               mtspr(SPR_LPID, 0); > +               isync(); > + > +               mtspr(SPR_LPCR, LPCR_LPES); > +               isync(); > +               break; >         } > + > +       __asm __volatile("mtsprg 0, %0" :: "r"(ap_pcpu)); > +       powerpc_sync(); >   } >     uintptr_t > > Modified: head/sys/powerpc/powernv/platform_powernv.c > ============================================================================== > --- head/sys/powerpc/powernv/platform_powernv.c Mon Jan 29 > 09:24:28 2018        (r328536) > +++ head/sys/powerpc/powernv/platform_powernv.c Mon Jan 29 > 09:27:02 2018        (r328537) > @@ -128,6 +128,7 @@ powernv_attach(platform_t plat) >         pcell_t prop; >         phandle_t cpu; >         int res, len, node, idx; > +       register_t msr; >         /* Ping OPAL again just to make sure */ >         opal_check(); > @@ -141,6 +142,19 @@ powernv_attach(platform_t plat) >         cpu_idle_hook = powernv_cpu_idle; >         powernv_boot_pir = mfspr(SPR_PIR); >   +     /* LPID must not be altered when PSL_DR or PSL_IR is > set */ > +       msr = mfmsr(); > +       mtmsr(msr & ~(PSL_DR | PSL_IR)); > + > +       /* Direct interrupts to SRR instead of HSRR and reset > LPCR otherwise */ > +       mtspr(SPR_LPID, 0); > +       isync(); > + > +       mtmsr(msr); > + > +       mtspr(SPR_LPCR, LPCR_LPES); > +       isync(); > + >         /* Init CPU bits */ >         powernv_smp_ap_init(plat); >   @@ -444,21 +458,6 @@ powernv_reset(platform_t platform) >   static void >   powernv_smp_ap_init(platform_t platform) >   { > -       register_t msr; > - > -       /* LPID must not be altered when PSL_DR or PSL_IR is > set */ > -       msr = mfmsr(); > -       mtmsr(msr & ~(PSL_DR | PSL_IR)); > - > -       isync(); > -       /* Direct interrupts to SRR instead of HSRR and reset > LPCR otherwise */ > -       mtspr(SPR_LPID, 0); > -       isync(); > - > -       mtmsr(msr); > - > -       mtspr(SPR_LPCR, LPCR_LPES); > -       isync(); >   } >     static void > > >