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From: Zbigniew Bodek <zbb@FreeBSD.org>
Date: Tue, 24 Feb 2015 12:31:09 +0000 (UTC)
To: src-committers@freebsd.org, svn-src-all@freebsd.org,
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Subject: svn commit: r279235 - head/sys/arm/arm
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Author: zbb
Date: Tue Feb 24 12:31:08 2015
New Revision: 279235
URL: https://svnweb.freebsd.org/changeset/base/279235

Log:
  Fix endianness on FDT read in ARM GIC
  
  Submitted by:  Jakub Palider <jpa@semihalf.com>
  Reviewed by:   ian, nwhitehorn
  Obtained from: Semihalf

Modified:
  head/sys/arm/arm/gic.c

Modified: head/sys/arm/arm/gic.c
==============================================================================
--- head/sys/arm/arm/gic.c	Tue Feb 24 10:35:07 2015	(r279234)
+++ head/sys/arm/arm/gic.c	Tue Feb 24 12:31:08 2015	(r279235)
@@ -205,7 +205,7 @@ gic_decode_fdt(uint32_t iparent, uint32_
 		*trig = INTR_TRIGGER_CONFORM;
 		*pol = INTR_POLARITY_CONFORM;
 	} else {
-		if (intr[0] == 0)
+		if (fdt32_to_cpu(intr[0]) == 0)
 			*interrupt = fdt32_to_cpu(intr[1]) + GIC_FIRST_SPI;
 		else
 			*interrupt = fdt32_to_cpu(intr[1]) + GIC_FIRST_PPI;
@@ -217,13 +217,13 @@ gic_decode_fdt(uint32_t iparent, uint32_
 		 *   8 = active low level-sensitive
 		 * The hardware only supports active-high-level or rising-edge.
 		 */
-		if (intr[2] & 0x0a) {
+		if (fdt32_to_cpu(intr[2]) & 0x0a) {
 			printf("unsupported trigger/polarity configuration "
-			    "0x%2x\n", intr[2] & 0x0f);
+			    "0x%2x\n", fdt32_to_cpu(intr[2]) & 0x0f);
 			return (ENOTSUP);
 		}
 		*pol  = INTR_POLARITY_CONFORM;
-		if (intr[2] & 0x01)
+		if (fdt32_to_cpu(intr[2]) & 0x01)
 			*trig = INTR_TRIGGER_EDGE;
 		else
 			*trig = INTR_TRIGGER_LEVEL;