From owner-svn-src-all@freebsd.org Mon Jan 18 20:49:58 2016 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id A08A1A8716D; Mon, 18 Jan 2016 20:49:58 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from bigwig.baldwin.cx (bigwig.baldwin.cx [IPv6:2001:470:1f11:75::1]) (using TLSv1 with cipher DHE-RSA-CAMELLIA256-SHA (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 7C24019A9; Mon, 18 Jan 2016 20:49:58 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from ralph.baldwin.cx (c-73-231-226-104.hsd1.ca.comcast.net [73.231.226.104]) by bigwig.baldwin.cx (Postfix) with ESMTPSA id 2D15CB946; Mon, 18 Jan 2016 15:49:56 -0500 (EST) From: John Baldwin To: Nathan Whitehorn Cc: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: Re: svn commit: r279189 - in head/sys/powerpc: aim fpu include powerpc Date: Mon, 18 Jan 2016 12:49:48 -0800 Message-ID: <11668266.h2pHzfGYxF@ralph.baldwin.cx> User-Agent: KMail/4.14.3 (FreeBSD/10.2-STABLE; KDE/4.14.3; amd64; ; ) In-Reply-To: <201502222140.t1MLeSFg075690@svn.freebsd.org> References: <201502222140.t1MLeSFg075690@svn.freebsd.org> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.7 (bigwig.baldwin.cx); Mon, 18 Jan 2016 15:49:56 -0500 (EST) X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 18 Jan 2016 20:49:58 -0000 On Sunday, February 22, 2015 09:40:28 PM Nathan Whitehorn wrote: > Author: nwhitehorn > Date: Sun Feb 22 21:40:27 2015 > New Revision: 279189 > URL: https://svnweb.freebsd.org/changeset/base/279189 > > Log: > Kernel support for the Vector-Scalar eXtension (VSX) found on the POWER7 > and POWER8. This instruction set unifies the 32 64-bit scalar floating > point registers with the 32 128-bit vector registers into a single bank > of 64 128-bit registers. Kernel support mostly amounts to saving and > restoring the wider version of the floating point registers and making > sure that both scalar FP and vector registers are enabled once a VSX > instruction is executed. get_mcontext() and friends currently cannot > see the high bits, which will require a little more work. > > As the system compiler (GCC 4.2) does not support VSX, making use of this > from userland requires either newer GCC or clang. > > Relnotes: yes > Sponsored by: FreeBSD Foundation > > Modified: > head/sys/powerpc/aim/trap.c > head/sys/powerpc/aim/trap_subr64.S > head/sys/powerpc/fpu/fpu_emu.c > head/sys/powerpc/fpu/fpu_explode.c > head/sys/powerpc/include/cpu.h > head/sys/powerpc/include/pcb.h > head/sys/powerpc/include/psl.h > head/sys/powerpc/include/reg.h > head/sys/powerpc/include/trap.h > head/sys/powerpc/powerpc/cpu.c > head/sys/powerpc/powerpc/db_trace.c > head/sys/powerpc/powerpc/exec_machdep.c > head/sys/powerpc/powerpc/fpu.c > > Modified: head/sys/powerpc/include/reg.h > ============================================================================== > --- head/sys/powerpc/include/reg.h Sun Feb 22 21:32:57 2015 (r279188) > +++ head/sys/powerpc/include/reg.h Sun Feb 22 21:40:27 2015 (r279189) > @@ -20,7 +20,10 @@ struct reg { > > /* Must match pcb.pcb_fpu */ > struct fpreg { > - double fpreg[32]; > + union { > + double fpr; > + uint64_t vsr[2]; > + } fpreg[32]; > double fpscr; > }; This breaks the ABI of struct fpreg which changes the format of coredumps. It also breaks the ABI of older versions of programs (such as debuggers) that use ptrace(PT_GETFPREGS) (the kernel will now overflow the user-allocated buffer if a debugger built on 10.x is run under an 11.0 kernel, and PT_SETFPREGS is going to also buffer overflow and store random garbage in the FP regs). Did you mean to alter the structure's layout? I can maybe fix upstream gdb to cope with either size, but it's a bit of a PITA. In particular, gdb assumes that all the floating point registers in struct fpreg are in a packed array (so it can use starting_offset + 8 * n to extract register 'n' and only the initial offset is something that different platform targets have to configure), so fixing this means having to add a lot of special cases and duplicate code that is otherwise shared across platforms. Hmm, I see that you preserved the ABI of mcontext by just copying the doubles. I think you should do the same for 'struct fpreg' restoring its ABI and we can use MD ptrace requests to fetch the VSX state. This is what Linux effectively does. -- John Baldwin