From owner-svn-src-all@FreeBSD.ORG Mon Jan 5 20:48:26 2015 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id B24C8D9C; Mon, 5 Jan 2015 20:48:26 +0000 (UTC) Received: from bigwig.baldwin.cx (bigwig.baldwin.cx [IPv6:2001:470:1f11:75::1]) (using TLSv1 with cipher DHE-RSA-CAMELLIA256-SHA (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 8B2402BE8; Mon, 5 Jan 2015 20:48:26 +0000 (UTC) Received: from new-host-2.home (pool-173-70-85-31.nwrknj.fios.verizon.net [173.70.85.31]) by bigwig.baldwin.cx (Postfix) with ESMTPSA id 6C46FB913; Mon, 5 Jan 2015 15:48:25 -0500 (EST) Message-ID: <54AAF898.2000705@FreeBSD.org> Date: Mon, 05 Jan 2015 15:48:24 -0500 From: John Baldwin User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.9; rv:31.0) Gecko/20100101 Thunderbird/31.3.0 MIME-Version: 1.0 To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: Re: svn commit: r276724 - in head/sys: amd64/amd64 dev/acpica i386/i386 kern sys x86/x86 References: <201501052044.t05KijiD033353@svn.freebsd.org> In-Reply-To: <201501052044.t05KijiD033353@svn.freebsd.org> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.7 (bigwig.baldwin.cx); Mon, 05 Jan 2015 15:48:25 -0500 (EST) X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 05 Jan 2015 20:48:26 -0000 On 1/5/15 3:44 PM, John Baldwin wrote: > Author: jhb > Date: Mon Jan 5 20:44:44 2015 > New Revision: 276724 > URL: https://svnweb.freebsd.org/changeset/base/276724 > > Log: > On some Intel CPUs with a P-state but not C-state invariant TSC the TSC > may also halt in C2 and not just C3 (it seems that in some cases the BIOS > advertises its C3 state as a C2 state in _CST). Just play it safe and > disable both C2 and C3 states if a user forces the use of the TSC as the > timecounter on such CPUs. > > PR: 192316 > Differential Revision: https://reviews.freebsd.org/D1441 > No objection from: jkim > MFC after: 1 week Oops, forgot to credit the submitter who tested the patch (a few iterations in fact): Tested by: Jan Kokemüller -- John Baldwin