From owner-svn-src-head@freebsd.org Thu Apr 27 17:53:07 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id C647AD531F6; Thu, 27 Apr 2017 17:53:07 +0000 (UTC) (envelope-from tuexen@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 8975B8B3; Thu, 27 Apr 2017 17:53:07 +0000 (UTC) (envelope-from tuexen@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v3RHr6g1087669; Thu, 27 Apr 2017 17:53:06 GMT (envelope-from tuexen@FreeBSD.org) Received: (from tuexen@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v3RHr6iZ087662; Thu, 27 Apr 2017 17:53:06 GMT (envelope-from tuexen@FreeBSD.org) Message-Id: <201704271753.v3RHr6iZ087662@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: tuexen set sender to tuexen@FreeBSD.org using -f From: Michael Tuexen Date: Thu, 27 Apr 2017 17:53:06 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r317512 - in head: sys/conf sys/libkern sys/libkern/arm64 sys/sys tests/sys/kern X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 27 Apr 2017 17:53:07 -0000 Author: tuexen Date: Thu Apr 27 17:53:05 2017 New Revision: 317512 URL: https://svnweb.freebsd.org/changeset/base/317512 Log: armv8 has support for optional CRC32C instructions. This patch checks if they are available and if that is true make use of them. Thank you very much to Andrew Turner for providing help and review the patch! Reviewed by: andrew MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D10499 Added: head/sys/libkern/arm64/ head/sys/libkern/arm64/crc32c_armv8.S (contents, props changed) Modified: head/sys/conf/files.arm64 head/sys/libkern/crc32.c head/sys/sys/libkern.h head/tests/sys/kern/Makefile head/tests/sys/kern/libkern_crc32.c Modified: head/sys/conf/files.arm64 ============================================================================== --- head/sys/conf/files.arm64 Thu Apr 27 16:38:28 2017 (r317511) +++ head/sys/conf/files.arm64 Thu Apr 27 17:53:05 2017 (r317512) @@ -191,6 +191,7 @@ libkern/fls.c standard libkern/flsl.c standard libkern/flsll.c standard libkern/memset.c standard +libkern/arm64/crc32c_armv8.S standard cddl/contrib/opensolaris/common/atomic/aarch64/opensolaris_atomic.S optional zfs | dtrace compile-with "${CDDL_C}" cddl/dev/dtrace/aarch64/dtrace_asm.S optional dtrace compile-with "${DTRACE_S}" cddl/dev/dtrace/aarch64/dtrace_subr.c optional dtrace compile-with "${DTRACE_C}" Added: head/sys/libkern/arm64/crc32c_armv8.S ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/libkern/arm64/crc32c_armv8.S Thu Apr 27 17:53:05 2017 (r317512) @@ -0,0 +1,78 @@ +/*- + * Copyright (c) 2017 Michael Tuexen + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + */ + +#include +__FBSDID("$FreeBSD$"); + +/* + * uint32_t + * armv8_crc32c(uint32_t crc, const unsigned char *buf, unsigned int len) + */ + +ENTRY(armv8_crc32c) + cbz w2, end + tbz x1, #0x0, half_word_aligned + sub w2, w2, 0x1 + ldr w10, [x1], #0x1 + crc32cb w0, w0, w10 +half_word_aligned: + cmp w2, #0x2 + b.lo last_byte + tbz x1, #0x1, word_aligned + sub w2, w2, 0x2 + ldr w10, [x1], #0x2 + crc32ch w0, w0, w10 +word_aligned: + cmp w2, #0x4 + b.lo last_half_word + tbz x1, #0x2, double_word_aligned + sub w2, w2, 0x4 + ldr w10, [x1], #0x4 + crc32cw w0, w0, w10 +double_word_aligned: + lsr w9, w2, #0x3 + cbz w9, last_word +loop: + ldr x10, [x1], #0x8 + crc32cx w0, w0, x10 + subs w9, w9, #1 + b.ne loop +last_word: + tbz w2, #0x2, last_half_word + ldr w10, [x1], #0x4 + crc32cw w0, w0, w10 +last_half_word: + tbz w2, #0x1, last_byte + ldr w10, [x1], #0x2 + crc32ch w0, w0, w10 +last_byte: + tbz w2, #0x0, end + ldr w10, [x1], #0x1 + crc32cb w0, w0, w10 +end: + ret +END(armv8_crc32c) Modified: head/sys/libkern/crc32.c ============================================================================== --- head/sys/libkern/crc32.c Thu Apr 27 16:38:28 2017 (r317511) +++ head/sys/libkern/crc32.c Thu Apr 27 17:53:05 2017 (r317512) @@ -54,6 +54,10 @@ __FBSDID("$FreeBSD$"); #include #endif +#if defined(__aarch64__) +#include +#endif + const uint32_t crc32_tab[] = { 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3, 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988, @@ -760,6 +764,18 @@ calculate_crc32c(uint32_t crc32c, return (sse42_crc32c(crc32c, buffer, length)); } else #endif +#if defined(__aarch64__) + uint64_t reg; + + /* + * We only test for CRC32 support on the CPU with index 0 assuming that + * this applies to all CPUs. + */ + reg = READ_SPECIALREG(id_aa64isar0_el1); + if (ID_AA64ISAR0_CRC32(reg) != ID_AA64ISAR0_CRC32_NONE) { + return (armv8_crc32c(crc32c, buffer, length)); + } else +#endif if (length < 4) { return (singletable_crc32c(crc32c, buffer, length)); } else { Modified: head/sys/sys/libkern.h ============================================================================== --- head/sys/sys/libkern.h Thu Apr 27 16:38:28 2017 (r317511) +++ head/sys/sys/libkern.h Thu Apr 27 17:53:05 2017 (r317512) @@ -210,6 +210,9 @@ calculate_crc32c(uint32_t crc32c, const #if defined(__amd64__) || defined(__i386__) uint32_t sse42_crc32c(uint32_t, const unsigned char *, unsigned); #endif +#if defined(__aarch64__) +uint32_t armv8_crc32c(uint32_t, const unsigned char *, unsigned int); +#endif #endif Modified: head/tests/sys/kern/Makefile ============================================================================== --- head/tests/sys/kern/Makefile Thu Apr 27 16:38:28 2017 (r317511) +++ head/tests/sys/kern/Makefile Thu Apr 27 17:53:05 2017 (r317512) @@ -30,10 +30,16 @@ NETBSD_ATF_TESTS_C+= mqueue_test CFLAGS.mqueue_test+= -I${SRCTOP}/tests LIBADD.mqueue_test+= rt -.if ${MACHINE_ARCH} == "amd64" || ${MACHINE_ARCH} == "i386" +.if ${MACHINE_ARCH} == "amd64" || \ + ${MACHINE_ARCH} == "i386" || \ + ${MACHINE_ARCH} == "aarch64" ATF_TESTS_C+= libkern_crc32 CFLAGS.libkern_crc32+= -DUSERSPACE_TESTING +.if ${MACHINE_ARCH} == "amd64" || ${MACHINE_ARCH} == "i386" LDADD.libkern_crc32+= ${SRCTOP}/sys/libkern/x86/crc32_sse42.c +.else +LDADD.libkern_crc32+= ${SRCTOP}/sys/libkern/arm64/crc32c_armv8.S +.endif .endif # subr_unit.c contains functions whose prototypes lie in headers that cannot be Modified: head/tests/sys/kern/libkern_crc32.c ============================================================================== --- head/tests/sys/kern/libkern_crc32.c Thu Apr 27 16:38:28 2017 (r317511) +++ head/tests/sys/kern/libkern_crc32.c Thu Apr 27 17:53:05 2017 (r317512) @@ -32,7 +32,13 @@ #include +#if defined(__amd64__) || defined(__i386__) extern uint32_t sse42_crc32c(uint32_t, const unsigned char *, unsigned); +#elif defined(__aarch64__) +extern uint32_t armv8_crc32c(uint32_t, const unsigned char *, unsigned); +#else +#error These tests are not supported on this platform +#endif ATF_TC_WITHOUT_HEAD(crc32c_basic_correctness); ATF_TC_BODY(crc32c_basic_correctness, tc) @@ -79,8 +85,13 @@ ATF_TC_BODY(crc32c_basic_correctness, tc ATF_REQUIRE(nitems(inputs) == nitems(results)); for (i = 0; i < nitems(inputs); i++) { +#if defined(__amd64__) || defined(__i386__) act = sse42_crc32c(~0, (const void *)&inputs[i], sizeof(inputs[0])); +#else + act = armv8_crc32c(~0, (const void *)&inputs[i], + sizeof(inputs[0])); +#endif ATF_REQUIRE_MSG(act == results[i], "crc32c(0x%jx) = 0x%08x, got 0x%08x", (uintmax_t)inputs[i], results[i], act); @@ -100,7 +111,11 @@ ATF_TC_BODY(crc32c_alignment, tc) for (i = 1; i < 8; i++) { memcpy(&buf[i], &input, sizeof(input)); +#if defined(__amd64__) || defined(__i386__) act = sse42_crc32c(~0, (const void *)&buf[i], sizeof(input)); +#else + act = armv8_crc32c(~0, (const void *)&buf[i], sizeof(input)); +#endif ATF_REQUIRE_MSG(act == result, "crc32c(0x%jx) = 0x%08x, got 0x%08x", (uintmax_t)input, result, act); @@ -117,7 +132,11 @@ ATF_TC_BODY(crc32c_trailing_bytes, tc) const uint32_t result = 0xec638d62; uint32_t act; +#if defined(__amd64__) || defined(__i386__) act = sse42_crc32c(~0, input, sizeof(input)); +#else + act = armv8_crc32c(~0, input, sizeof(input)); +#endif ATF_REQUIRE_MSG(act == result, "expected 0x%08x, got 0x%08x", result, act); }