Date: Sun, 1 Mar 2015 07:00:35 +0000 (UTC) From: Adrian Chadd <adrian@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r279480 - head/sys/mips/atheros Message-ID: <201503010700.t2170ZOV071616@svn.freebsd.org>
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Author: adrian Date: Sun Mar 1 07:00:34 2015 New Revision: 279480 URL: https://svnweb.freebsd.org/changeset/base/279480 Log: Add very initial QCA955x awareness to the GPIO code. There's a lot more to come - the QCA955x has a bunch more GPIO MUX configuration, reminiscent of what the ARM chips let you do - but it'll have to come later. Modified: head/sys/mips/atheros/ar71xx_gpio.c Modified: head/sys/mips/atheros/ar71xx_gpio.c ============================================================================== --- head/sys/mips/atheros/ar71xx_gpio.c Sun Mar 1 06:59:32 2015 (r279479) +++ head/sys/mips/atheros/ar71xx_gpio.c Sun Mar 1 07:00:34 2015 (r279480) @@ -50,9 +50,10 @@ __FBSDID("$FreeBSD$"); #include <mips/atheros/ar71xxreg.h> #include <mips/atheros/ar71xx_setup.h> #include <mips/atheros/ar71xx_gpiovar.h> +#include <dev/gpio/gpiobusvar.h> #include <mips/atheros/ar933xreg.h> #include <mips/atheros/ar934xreg.h> -#include <dev/gpio/gpiobusvar.h> +#include <mips/atheros/qca955xreg.h> #include "gpio_if.h" @@ -96,7 +97,9 @@ ar71xx_gpio_function_enable(struct ar71x { if (ar71xx_soc == AR71XX_SOC_AR9341 || ar71xx_soc == AR71XX_SOC_AR9342 || - ar71xx_soc == AR71XX_SOC_AR9344) + ar71xx_soc == AR71XX_SOC_AR9344 || + ar71xx_soc == AR71XX_SOC_QCA9556 || + ar71xx_soc == AR71XX_SOC_QCA9558) GPIO_SET_BITS(sc, AR934X_GPIO_REG_FUNC, mask); else GPIO_SET_BITS(sc, AR71XX_GPIO_FUNCTION, mask); @@ -107,7 +110,9 @@ ar71xx_gpio_function_disable(struct ar71 { if (ar71xx_soc == AR71XX_SOC_AR9341 || ar71xx_soc == AR71XX_SOC_AR9342 || - ar71xx_soc == AR71XX_SOC_AR9344) + ar71xx_soc == AR71XX_SOC_AR9344 || + ar71xx_soc == AR71XX_SOC_QCA9556 || + ar71xx_soc == AR71XX_SOC_QCA9558) GPIO_CLEAR_BITS(sc, AR934X_GPIO_REG_FUNC, mask); else GPIO_CLEAR_BITS(sc, AR71XX_GPIO_FUNCTION, mask); @@ -169,6 +174,9 @@ ar71xx_gpio_pin_max(device_t dev, int *m case AR71XX_SOC_AR9342: case AR71XX_SOC_AR9344: *maxpin = AR934X_GPIO_COUNT - 1; + case AR71XX_SOC_QCA9556: + case AR71XX_SOC_QCA9558: + *maxpin = QCA955X_GPIO_COUNT - 1; break; default: *maxpin = AR71XX_GPIO_PINS - 1;
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