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Date:      Thu, 2 Aug 2012 16:58:41 -0400
From:      John Baldwin <jhb@freebsd.org>
To:        freebsd-stable@freebsd.org
Cc:        Alexander Motin <mav@freebsd.org>, Steve Polyack <korvus@comcast.net>, freebsd-hardware@freebsd.org
Subject:   Re: Problem detecting Sil3124 SATA controllers off of Sandy Bridge northbridge-connected PCIe slots
Message-ID:  <201208021658.41541.jhb@freebsd.org>
In-Reply-To: <501AE488.1090001@comcast.net>
References:  <501A8CE0.4000800@comcast.net> <201208021358.59897.jhb@freebsd.org> <501AE488.1090001@comcast.net>

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On Thursday, August 02, 2012 4:35:20 pm Steve Polyack wrote:
> On 08/02/2012 01:58 PM, John Baldwin wrote:
> > On Thursday, August 02, 2012 10:21:20 am Steve Polyack wrote:
> >> Hi,
> >>
> >> We're having some trouble with detection of a couple of Sil3124 SATA
> >> controller cards on newer motherboard and processor combos.
> >> Specifically, we're running a Supermicro X9SCM-F motherboard (latest
> >> BIOS) and Intel E3-1220v2 CPU.
> >>
> >> What we're seeing:
> >> - Syba Sil3124 PCIe cards are only being detected when installed in PCIe
> >> Slot 4
> >> -- The motherboard documentation shows that this is the only slot
> >> connected to the Intel C202/204 chipset on the motherboard
> >> -- Slots 5, 6, and 7 are connected to the integrated northbridge on the
> >> Ivy Bridge CPU
> >> (there is no slot 1, 2, or 3)
> >>
> >> FreeBSD won't detect even a single Sil3124 card installed in PCIe slot
> >> 5, 6, or 7.  If we put an Intel Dual-port NIC in either of one of these
> >> slots, it is detected just fine.
> >>
> >> I've attached a verbose dmesg.boot from this box running FreeBSD
> >> 9.0-RELEASE.  We've also tried 8.1-RELEASE, 8.2-RELEASE, and 9.1-BETA1
> >> with the same results.  Booting with ACPI disabled results in a kernel
> >> panic during the boot process.
> >>
> >> I'd greatly appreciate any help or suggestions on this matter. We've
> >> already tried just about every BIOS option on the board.
> > Does the device show up in pciconf -l output?
> >
> The device itself does NOT show up in pciconf -l output.  However, I ran 
> pciconf on two different boots, once with and once without the card 
> installed in one of the non-probed slots.  I noticed that the following 
> "Ivy Bridge PCI Express Root Port" showed up when the card was installed:
> +pcib2@pci0:0:1:1:    class=0x060400 card=0x062415d9 chip=0x01558086 
> rev=0x09 hdr=0x01
> +    vendor     = 'Intel Corporation'
> +    device     = 'Ivy Bridge PCI Express Root Port'
> +    class      = bridge
> +    subclass   = PCI-PCI
> +    cap 0d[88] = PCI Bridge card=0x062415d9
> +    cap 01[80] = powerspec 3  supports D0 D3  current D0
> +    cap 05[90] = MSI supports 1 message
> +    cap 10[a0] = PCI-Express 2 root port max data 128(128) link x1(x8)
> +    ecap 0002[100] = VC 1 max VC0
> +    ecap 0005[140] = unknown 1
> +    ecap 0019[d94] = unknown 1

Oh, now I see the problem.  This isn't completely trivial to solve. :(

pcib3: <PCI-PCI bridge> at device 0.0 on pci2
pcib2: attempting to grow I/O port window for (0-0xfff,0x1000)
pcib3: failed to allocate initial I/O port window: 0-0xfff
pcib2: attempting to grow memory window for (0-0xfffff,0x100000)
pcib3: failed to allocate initial memory window: 0-0xfffff
pcib2: failed to allocate initial prefetch window (0-0xfffff,0x100000)
pcib2: attempting to grow memory window for (0-0xfffff,0x100000)
pcib3: failed to allocate initial prefetch window: 0-0xfffff
pcib3:   domain            0
pcib3:   secondary bus     0
pcib3:   subordinate bus   0
pcib3:   no prefetched decode

This bridge isn't configured by the BIOS, so we can't see any devices behind 
it.  I have some patches to start adding support for fixing that, but they are 
incomplete (and I haven't touched them in months).  Try this hack as a test:

Index: sys/dev/pci/pci_pci.c
===================================================================
--- pci_pci.c	(revision 238992)
+++ pci_pci.c	(working copy)
@@ -566,6 +566,13 @@ pcib_attach_common(device_t dev)
     SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "subbus",
       CTLFLAG_RD, &sc->subbus, 0, "Subordinate bus number");
 
+    if (device_get_unit(dev) == 3 && sc->secbus == 0 && sc->subbus == 0) {
+	    pci_write_config(dev, PCIR_SUBBUS_1, 3, 1);
+	    pci_write_config(dev, PCIR_SECBUS_1, 3, 1);
+	    sc->secbus = 3;
+	    sc->subbus = 3;
+    }
+
     /*
      * Quirk handling.
      */


-- 
John Baldwin



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