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Date: Tue, 10 Jan 2012 22:37:19 +0100
From: Luigi Rizzo <rizzo@iet.unipi.it>
To: FreeBSD current <freebsd-current@FreeBSD.org>
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Subject: memory barriers in bus_dmamap_sync() ?
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I was glancing through manpages and implementations of bus_dma(9)
and i am a bit unclear on what this API (in particular, bus_dmamap_sync() )
does in terms of memory barriers.

I see that the x86/amd64 and ia64 code only does the bounce buffers.
The mips seems to do some coherency-related calls.

How do we guarantee, say, that a recently built packet is
to memory before issuing the tx command to the NIC ?

cheers
luigi