From owner-freebsd-usb@FreeBSD.ORG Wed Dec 19 08:25:02 2012 Return-Path: Delivered-To: freebsd-usb@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 946692FC; Wed, 19 Dec 2012 08:25:02 +0000 (UTC) (envelope-from hselasky@c2i.net) Received: from swip.net (mailfe06.c2i.net [212.247.154.162]) by mx1.freebsd.org (Postfix) with ESMTP id E32F38FC1C; Wed, 19 Dec 2012 08:25:01 +0000 (UTC) X-T2-Spam-Status: No, hits=-1.0 required=5.0 tests=ALL_TRUSTED Received: from [176.74.213.204] (account mc467741@c2i.net HELO laptop015.hselasky.homeunix.org) by mailfe06.swip.net (CommuniGate Pro SMTP 5.4.4) with ESMTPA id 358683740; Wed, 19 Dec 2012 09:24:58 +0100 From: Hans Petter Selasky To: Warner Losh Subject: Re: EHCI on armv6 with Write-Back caches Date: Wed, 19 Dec 2012 09:26:35 +0100 User-Agent: KMail/1.13.7 (FreeBSD/9.1-PRERELEASE; KDE/4.8.4; amd64; ; ) References: <20121218204931.5322922d@fubar.geek.nz> <201212182044.11326.hselasky@c2i.net> <1482FC19-720A-480A-BAD2-C8CD306E2E5F@bsdimp.com> In-Reply-To: <1482FC19-720A-480A-BAD2-C8CD306E2E5F@bsdimp.com> X-Face: 'mmZ:T{)),Oru^0c+/}w'`gU1$ubmG?lp!=R4Wy\ELYo2)@'UZ24N@d2+AyewRX}mAm; Yp |U[@, _z/([?1bCfM{_"B<.J>mICJCHAzzGHI{y7{%JVz%R~yJHIji`y>Y}k1C4TfysrsUI -%GU9V5]iUZF&nRn9mJ'?&>O MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Message-Id: <201212190926.35132.hselasky@c2i.net> Cc: Oleksandr Tymoshenko , Andrew Turner , freebsd-usb@freebsd.org X-BeenThere: freebsd-usb@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: FreeBSD support for USB List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 19 Dec 2012 08:25:02 -0000 On Tuesday 18 December 2012 21:32:46 Warner Losh wrote: > On Dec 18, 2012, at 12:44 PM, Hans Petter Selasky wrote: > > On Tuesday 18 December 2012 20:12:29 Andrew Turner wrote: > >> On Tue, 18 Dec 2012 13:06:44 +0100 > >> > >> Hans Petter Selasky wrote: > >>> Hi Andrew, > >>> > >>>> The BUS_DMA_COHERENT flag does nothing on armv6 as we need the cache > >>>> enabled for atomic operations to work correctly and we would have to > >>>> disable the cache on the entire page. This is acceptable behaviour > >>>> from the description of the flag in the busdma man page. > >>> > >>> Yes, but when I allocate memory from the USB stack, then I want that > >>> memory to not be cached. It is simply not that useful to have that > >>> memory cached. I didn't check the latest state of busdma, but if I'm > >>> not mistaken, if the BUS_DMA_COHERENT flag is set on the DMA tag, the > >>> flush/invalidate will simply return and do nothing. Maybe that is the > >>> problem ... > >> > >> The exact meaning of BUS_DMA_COHERENT depends on the architecture. The > >> code is still required to call bus_dmamap_sync with a coherent map but > >> when the flag is implemented the cost of the operation will be reduced. > >> It doesn't guarantee the memory is uncached, it may be implemented that > >> way but the USB code can't rely on it. > >> > >> Andrew > > > > The USB code doesn't rely on this flag. I'm wondering if BUSDMA by > > accident sets this flag, so that the cache sync ops are not called. > > No. It doesn't. > Hi, > Does the USB code still touch bytes in the same cache line while the DMA is > still outstanding? Yes, only for data. The busdma API must handle this case properly as discussed before. --HPS