From owner-svn-src-all@freebsd.org Mon Nov 4 19:38:08 2019 Return-Path: Delivered-To: svn-src-all@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 637321AE457; Mon, 4 Nov 2019 19:38:08 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 476NPX1y6pz4Fpq; Mon, 4 Nov 2019 19:38:08 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 0C421F02; Mon, 4 Nov 2019 19:38:08 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id xA4Jc7db089236; Mon, 4 Nov 2019 19:38:07 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id xA4Jc7G5089235; Mon, 4 Nov 2019 19:38:07 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201911041938.xA4Jc7G5089235@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Mon, 4 Nov 2019 19:38:07 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r354339 - head/contrib/llvm/lib/Target/PowerPC X-SVN-Group: head X-SVN-Commit-Author: dim X-SVN-Commit-Paths: head/contrib/llvm/lib/Target/PowerPC X-SVN-Commit-Revision: 354339 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 04 Nov 2019 19:38:08 -0000 Author: dim Date: Mon Nov 4 19:38:07 2019 New Revision: 354339 URL: https://svnweb.freebsd.org/changeset/base/354339 Log: Merge commit 97e362607 from llvm git (by Nemanja Ivanovic): [PowerPC] Do not emit HW loop if the body contains calls to lrint/lround These two intrinsics are lowered to calls so should prevent the formation of CTR loops. In a subsequent patch, we will handle all currently known intrinsics and prevent the formation of HW loops if any unknown intrinsics are encountered. Differential revision: https://reviews.llvm.org/D68841 This should fix an "invalid CRT loop" assertion when building the www/node port for powerpc64. Requested by: Alfredo Dal'Ava Júnior MFC after: 1 month X-MFC-With: r353358 Modified: head/contrib/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp Modified: head/contrib/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp ============================================================================== --- head/contrib/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp Mon Nov 4 19:30:19 2019 (r354338) +++ head/contrib/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp Mon Nov 4 19:38:07 2019 (r354339) @@ -331,8 +331,12 @@ bool PPCTTIImpl::mightUseCTR(BasicBlock *BB, case Intrinsic::ceil: Opcode = ISD::FCEIL; break; case Intrinsic::trunc: Opcode = ISD::FTRUNC; break; case Intrinsic::rint: Opcode = ISD::FRINT; break; + case Intrinsic::lrint: Opcode = ISD::LRINT; break; + case Intrinsic::llrint: Opcode = ISD::LLRINT; break; case Intrinsic::nearbyint: Opcode = ISD::FNEARBYINT; break; case Intrinsic::round: Opcode = ISD::FROUND; break; + case Intrinsic::lround: Opcode = ISD::LROUND; break; + case Intrinsic::llround: Opcode = ISD::LLROUND; break; case Intrinsic::minnum: Opcode = ISD::FMINNUM; break; case Intrinsic::maxnum: Opcode = ISD::FMAXNUM; break; case Intrinsic::umul_with_overflow: Opcode = ISD::UMULO; break;