Date: Wed, 12 Feb 2014 15:09:53 -0800 From: Marcel Moolenaar <marcel@xcllnt.net> To: John Baldwin <jhb@freebsd.org> Cc: Marcel Moolenaar <marcel@freebsd.org>, ia64@freebsd.org Subject: Re: svn commit: r261790 - in head/sys: amd64/include dev/acpica dev/cardbus dev/pccbb dev/pci i386/include sparc64/pci x86/include x86/pci x86/x86 Message-ID: <FC0CF6C1-82E5-478B-86D7-01E1432F0F1E@xcllnt.net> In-Reply-To: <201402121425.48635.jhb@freebsd.org> References: <201402120430.s1C4Uctm088069@svn.freebsd.org> <201402121425.48635.jhb@freebsd.org>
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--Apple-Mail=_9C041427-D321-4AA9-8E44-C793F90BDCA5 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=us-ascii On Feb 12, 2014, at 11:25 AM, John Baldwin <jhb@freebsd.org> wrote: > On Tuesday, February 11, 2014 11:30:38 pm John Baldwin wrote: >> Author: jhb >> Date: Wed Feb 12 04:30:37 2014 >> New Revision: 261790 >> URL: http://svnweb.freebsd.org/changeset/base/261790 >>=20 >> Log: >> Add support for managing PCI bus numbers. As with BARs and PCI-PCI = bridge >> I/O windows, the default is to preserve the firmware-assigned = resources. >> PCI bus numbers are only managed if NEW_PCIB is enabled and the = architecture >> defines a PCI_RES_BUS resource type. >> - Add a helper API to create top-level PCI bus resource managers for = each >> PCI domain/segment. Host-PCI bridge drivers use this API to = allocate >> bus numbers from their associated domain. >> - Change the PCI bus and CardBus drivers to allocate a bus resource = for >> their bus number from the parent PCI bridge device. >> - Change the PCI-PCI and PCI-CardBus bridge drivers to allocate the >> full range of bus numbers from secbus to subbus from their parent = bridge. >> The drivers also always program their primary bus register. The = bridge >> drivers also support growing their bus range by extending the bus = resource >> and updating subbus to match the larger range. >> - Add support for managing PCI bus resources to the Host-PCI bridge = drivers >> used for amd64 and i386 (acpi_pcib, mptable_pcib, legacy_pcib, and = qpi_pcib). >> - Define a PCI_RES_BUS resource type for amd64 and i386. >=20 > Since ia64 only uses ACPI Host-PCI bridges, I believe that this can be = enabled > on ia64 by just adding an appropriate #define for PCI_RES_BUS to > <machine/bus.h>. I just have no way to test it. I'll give it a spin. Altix 350 & Altix 450 have non-standard PCI host controllers, which I do want to test. The firmware does not dictate bus numbers, so it may be a non-issue. Thanks for the heads-up! --=20 Marcel Moolenaar marcel@xcllnt.net --Apple-Mail=_9C041427-D321-4AA9-8E44-C793F90BDCA5 Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename=signature.asc Content-Type: application/pgp-signature; name=signature.asc Content-Description: Message signed with OpenPGP using GPGMail -----BEGIN PGP SIGNATURE----- Comment: GPGTools - http://gpgtools.org iEYEARECAAYFAlL7/0EACgkQpgWlLWHuifb9mQCfSDi3KcmVi2N/Xv7WL2cle6zq 1YMAnj9JjngkcOFP1iPF6w+MtpjOLZkX =6FLJ -----END PGP SIGNATURE----- --Apple-Mail=_9C041427-D321-4AA9-8E44-C793F90BDCA5--
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