Date: Mon, 20 Aug 2018 09:00:17 -0700 From: Mark Millard <marklmi@yahoo.com> To: Toomas Soome via freebsd-hackers <freebsd-hackers@freebsd.org>, freebsd-drivers@freebsd.org Subject: Fwd: Need a clarification regarding I2C bus frequency in FreeBSD Message-ID: <EB9B6199-331D-4269-B14C-F061E472A9C5@yahoo.com> References: <35F2C250-B4CB-4C53-BF8F-43C338022E34@yahoo.com>
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[Resend to (just the list) from the right account.] On 2018-Aug-20, at 6:18 AM, Ian Lepore <ian at freebsd.org> wrote: > On Mon, 2018-08-20 at 11:13 +0300, Daniel Braniss wrote: >>=20 >>>=20 >>> On 20 Aug 2018, at 09:49, Daniel Braniss <danny@cs.huji.ac.il> = wrote: >>>=20 >>>> . . . >>>=20 >>> hi, >>> I have similar issues with the allwinner/twsi but I do have a Saleae = Logic and here is a nice picture: >> ah, maybe this is better: >> = https://cs.huji.ac.il/~danny/Screen%20Shot%202018-08-20%20at%2011.06.43.pn= g > . . . > This has nothing to do with the twsi driver, this is about the ig4 > driver (found in sys/dev/ichiic). >=20 > That screenshot seems to show a bus running at 100KHz like it should > (although the 62:38 duty cycle is a bit suspicious). Being a logic analyzer display, it my just be that the threshold was off from the optimal value. The waveform shape is not really visible. The logic analyzer output also shows a thick "rising" edge without the uparrow symbol. My guess would be that is a rising/falling/rising sequence that on the scale in use does not show space between edges. In other words: a glitch on the leading edge side of the intended pulse. This too might be tied to the threshold used vs . the actual signal properties: no way to tell from what is shown. =3D=3D=3D Mark Millard marklmi at yahoo.com ( dsl-only.net went away in early 2018-Mar)
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