Date: Thu, 16 Jul 2015 10:23:09 +0000 From: "zbb (Zbigniew Bodek)" <phabric-noreply@FreeBSD.org> To: freebsd-arm@freebsd.org Subject: [Differential] [Closed] D3093: ARM64 TCR register update Message-ID: <588e155e953d3437c59f372a46db3bb1@localhost.localdomain> In-Reply-To: <differential-rev-PHID-DREV-qvctvfcls3krqccl2a3p-req@FreeBSD.org> References: <differential-rev-PHID-DREV-qvctvfcls3krqccl2a3p-req@FreeBSD.org>
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--b1_588e155e953d3437c59f372a46db3bb1 Content-Type: text/plain; charset = "utf-8" Content-Transfer-Encoding: 8bit This revision was automatically updated to reflect the committed changes. Closed by commit rS285626: Set-up proper TCR values for memory related to Translation Table Walking (authored by zbb). CHANGED PRIOR TO COMMIT https://reviews.freebsd.org/D3093?vs=7005&id=7009#toc REPOSITORY rS FreeBSD src repository CHANGES SINCE LAST UPDATE https://reviews.freebsd.org/D3093?vs=7005&id=7009 REVISION DETAIL https://reviews.freebsd.org/D3093 AFFECTED FILES head/sys/arm64/arm64/locore.S head/sys/arm64/include/armreg.h CHANGE DETAILS diff --git a/head/sys/arm64/arm64/locore.S b/head/sys/arm64/arm64/locore.S --- a/head/sys/arm64/arm64/locore.S +++ b/head/sys/arm64/arm64/locore.S @@ -535,7 +535,8 @@ /* Device Normal, no cache Normal, write-back */ .quad MAIR_ATTR(0x00, 0) | MAIR_ATTR(0x44, 1) | MAIR_ATTR(0xff, 2) tcr: - .quad (TCR_TxSZ(64 - VIRT_BITS) | TCR_ASID_16 | TCR_TG1_4K) + .quad (TCR_TxSZ(64 - VIRT_BITS) | TCR_ASID_16 | TCR_TG1_4K | \ + TCR_CACHE_ATTRS | TCR_SMP_ATTRS) sctlr_set: /* Bits to set */ .quad (SCTLR_UCI | SCTLR_nTWE | SCTLR_nTWI | SCTLR_UCT | SCTLR_DZE | \ diff --git a/head/sys/arm64/include/armreg.h b/head/sys/arm64/include/armreg.h --- a/head/sys/arm64/include/armreg.h +++ b/head/sys/arm64/include/armreg.h @@ -200,6 +200,28 @@ #define TCR_TG1_4K (2 << TCR_TG1_SHIFT) #define TCR_TG1_64K (3 << TCR_TG1_SHIFT) +#define TCR_SH1_SHIFT 28 +#define TCR_SH1_IS (0x3UL << TCR_SH1_SHIFT) +#define TCR_ORGN1_SHIFT 26 +#define TCR_ORGN1_WBWA (0x1UL << TCR_ORGN1_SHIFT) +#define TCR_IRGN1_SHIFT 24 +#define TCR_IRGN1_WBWA (0x1UL << TCR_IRGN1_SHIFT) +#define TCR_SH0_SHIFT 12 +#define TCR_SH0_IS (0x3UL << TCR_SH0_SHIFT) +#define TCR_ORGN0_SHIFT 10 +#define TCR_ORGN0_WBWA (0x1UL << TCR_ORGN0_SHIFT) +#define TCR_IRGN0_SHIFT 8 +#define TCR_IRGN0_WBWA (0x1UL << TCR_IRGN0_SHIFT) + +#define TCR_CACHE_ATTRS ((TCR_IRGN0_WBWA | TCR_IRGN1_WBWA) |\ + (TCR_ORGN0_WBWA | TCR_ORGN1_WBWA)) + +#ifdef SMP +#define TCR_SMP_ATTRS (TCR_SH0_IS | TCR_SH1_IS) +#else +#define TCR_SMP_ATTRS 0 +#endif + #define TCR_T1SZ_SHIFT 16 #define TCR_T0SZ_SHIFT 0 #define TCR_TxSZ(x) (((x) << TCR_T1SZ_SHIFT) | ((x) << TCR_T0SZ_SHIFT)) EMAIL PREFERENCES https://reviews.freebsd.org/settings/panel/emailpreferences/ To: wma_semihalf.com, zbb, emaste, andrew Cc: imp, andrew, freebsd-arm-list, emaste --b1_588e155e953d3437c59f372a46db3bb1 Content-Type: text/x-patch; charset=utf-8; name="D3093.7009.patch" Content-Transfer-Encoding: base64 Content-Disposition: attachment; filename="D3093.7009.patch" ZGlmZiAtLWdpdCBhL2hlYWQvc3lzL2FybTY0L2FybTY0L2xvY29yZS5TIGIvaGVhZC9zeXMvYXJt NjQvYXJtNjQvbG9jb3JlLlMKLS0tIGEvaGVhZC9zeXMvYXJtNjQvYXJtNjQvbG9jb3JlLlMKKysr IGIvaGVhZC9zeXMvYXJtNjQvYXJtNjQvbG9jb3JlLlMKQEAgLTUzNSw3ICs1MzUsOCBAQAogCQkv KiBEZXZpY2UgICAgICAgICAgICBOb3JtYWwsIG5vIGNhY2hlICAgICBOb3JtYWwsIHdyaXRlLWJh Y2sgKi8KIAkucXVhZAlNQUlSX0FUVFIoMHgwMCwgMCkgfCBNQUlSX0FUVFIoMHg0NCwgMSkgfCBN QUlSX0FUVFIoMHhmZiwgMikKIHRjcjoKLQkucXVhZCAoVENSX1R4U1ooNjQgLSBWSVJUX0JJVFMp IHwgVENSX0FTSURfMTYgfCBUQ1JfVEcxXzRLKQorCS5xdWFkIChUQ1JfVHhTWig2NCAtIFZJUlRf QklUUykgfCBUQ1JfQVNJRF8xNiB8IFRDUl9URzFfNEsgfCBcCisJICAgIFRDUl9DQUNIRV9BVFRS UyB8IFRDUl9TTVBfQVRUUlMpCiBzY3Rscl9zZXQ6CiAJLyogQml0cyB0byBzZXQgKi8KIAkucXVh ZCAoU0NUTFJfVUNJIHwgU0NUTFJfblRXRSB8IFNDVExSX25UV0kgfCBTQ1RMUl9VQ1QgfCBTQ1RM Ul9EWkUgfCBcCmRpZmYgLS1naXQgYS9oZWFkL3N5cy9hcm02NC9pbmNsdWRlL2FybXJlZy5oIGIv aGVhZC9zeXMvYXJtNjQvaW5jbHVkZS9hcm1yZWcuaAotLS0gYS9oZWFkL3N5cy9hcm02NC9pbmNs dWRlL2FybXJlZy5oCisrKyBiL2hlYWQvc3lzL2FybTY0L2luY2x1ZGUvYXJtcmVnLmgKQEAgLTIw MCw2ICsyMDAsMjggQEAKICNkZWZpbmUJVENSX1RHMV80SwkoMiA8PCBUQ1JfVEcxX1NISUZUKQog I2RlZmluZQlUQ1JfVEcxXzY0SwkoMyA8PCBUQ1JfVEcxX1NISUZUKQogCisjZGVmaW5lCVRDUl9T SDFfU0hJRlQJMjgKKyNkZWZpbmUJVENSX1NIMV9JUwkoMHgzVUwgPDwgVENSX1NIMV9TSElGVCkK KyNkZWZpbmUJVENSX09SR04xX1NISUZUCTI2CisjZGVmaW5lCVRDUl9PUkdOMV9XQldBCSgweDFV TCA8PCBUQ1JfT1JHTjFfU0hJRlQpCisjZGVmaW5lCVRDUl9JUkdOMV9TSElGVAkyNAorI2RlZmlu ZQlUQ1JfSVJHTjFfV0JXQQkoMHgxVUwgPDwgVENSX0lSR04xX1NISUZUKQorI2RlZmluZQlUQ1Jf U0gwX1NISUZUCTEyCisjZGVmaW5lCVRDUl9TSDBfSVMJKDB4M1VMIDw8IFRDUl9TSDBfU0hJRlQp CisjZGVmaW5lCVRDUl9PUkdOMF9TSElGVAkxMAorI2RlZmluZQlUQ1JfT1JHTjBfV0JXQQkoMHgx VUwgPDwgVENSX09SR04wX1NISUZUKQorI2RlZmluZQlUQ1JfSVJHTjBfU0hJRlQJOAorI2RlZmlu ZQlUQ1JfSVJHTjBfV0JXQQkoMHgxVUwgPDwgVENSX0lSR04wX1NISUZUKQorCisjZGVmaW5lCVRD Ul9DQUNIRV9BVFRSUwkoKFRDUl9JUkdOMF9XQldBIHwgVENSX0lSR04xX1dCV0EpIHxcCisJCQkJ KFRDUl9PUkdOMF9XQldBIHwgVENSX09SR04xX1dCV0EpKQorCisjaWZkZWYgU01QCisjZGVmaW5l CVRDUl9TTVBfQVRUUlMJKFRDUl9TSDBfSVMgfCBUQ1JfU0gxX0lTKQorI2Vsc2UKKyNkZWZpbmUJ VENSX1NNUF9BVFRSUwkwCisjZW5kaWYKKwogI2RlZmluZQlUQ1JfVDFTWl9TSElGVAkxNgogI2Rl ZmluZQlUQ1JfVDBTWl9TSElGVAkwCiAjZGVmaW5lCVRDUl9UeFNaKHgpCSgoKHgpIDw8IFRDUl9U MVNaX1NISUZUKSB8ICgoeCkgPDwgVENSX1QwU1pfU0hJRlQpKQoK --b1_588e155e953d3437c59f372a46db3bb1--
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