From owner-svn-src-head@freebsd.org Wed May 17 04:32:48 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 1D416D70D5E; Wed, 17 May 2017 04:32:48 +0000 (UTC) (envelope-from melounmichal@gmail.com) Received: from mail-wm0-x244.google.com (mail-wm0-x244.google.com [IPv6:2a00:1450:400c:c09::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority G2" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id C690F1738; Wed, 17 May 2017 04:32:47 +0000 (UTC) (envelope-from melounmichal@gmail.com) Received: by mail-wm0-x244.google.com with SMTP id v4so685386wmb.2; Tue, 16 May 2017 21:32:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:reply-to:subject:to:references:message-id:date:user-agent :mime-version:in-reply-to:content-language:content-transfer-encoding; bh=ZENQJIlgHoB2u6+W8TE+cBpqarNK+KU8/4M0GBa7bu8=; b=pMiLyn5nrSVK8FMyIOf1EF14NmYfCl+Dmhi1sqFyqMR3CnYT/jgOI5otBp+0n/ceQM ronz+4FVUX7UZHjnQ+My0Mc6w+ZFXiTLksR1kqqwgz47BLHpQ22WKD/Teyia60upZT83 cDI68hOBQDfT5+JLOaZpk6JJU3H3tnLqgBBHP3tUVOBjy9v4bGftXtzpOlTKSHXK3M/O eDr+QiwCY5TIY+ENoGU8aBdEjCK/DDUeiirZCrpILZ9UDsiCzAYytYn59FjHUoOeIyls wCjP9Yq/iIGXTnN/RQxlJyWePpVaaZ7YDrBFXMjiLLFIgle9FcgZCwMxWsxRuGVGFsdq l2LQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:reply-to:subject:to:references:message-id :date:user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=ZENQJIlgHoB2u6+W8TE+cBpqarNK+KU8/4M0GBa7bu8=; b=RF3W3o0Y9ysnmHPv6hnLHPgW63f3CLHjgtOToKjZk2/iXcgc+9PB38eu/OP1fYGARX gdEHKd5eiLmInKBHmfokl3jvxYVQP6MuROoNv6RoOu/K/6NCrgbvi5SM9lNGtiig+En2 e56LyQfXuB5IRG82G53bM6X/tbc6Xpyn6cRZq38oyM91M7+O3BEJzwOxMn6fZBrsjL7I Iwil2LIELDID1NPdenToz1r5XOZZTrHWMtanUB17yGmZAWLPN68w123i86aXG6FJnIjN KXpqA78VmQRLa23vbSm5nZm1CeOQp3s8hUIAeN7TRTo7SRyoWyTFjyIhu32+EuHUONoy MJww== X-Gm-Message-State: AODbwcB5uan31rZheSM5juqPHc7K/4qbCbUD5aCUQUR02i5UPDF8IuQc znBYk6/L/pggZMwbzKE= X-Received: by 10.28.154.86 with SMTP id c83mr9605806wme.94.1494995565761; Tue, 16 May 2017 21:32:45 -0700 (PDT) Received: from [88.208.79.100] (halouny.humusoft.cz. [88.208.79.100]) by smtp.gmail.com with ESMTPSA id j126sm1538374wmd.29.2017.05.16.21.32.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 16 May 2017 21:32:45 -0700 (PDT) From: Michal Meloun X-Google-Original-From: Michal Meloun Reply-To: mmel@freebsd.org Subject: Re: svn commit: r318336 - head/sys/arm/mv To: Luiz Otavio O Souza , src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org References: <201705160447.v4G4lpJd018173@repo.freebsd.org> Message-ID: Date: Wed, 17 May 2017 06:32:48 +0200 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.1.0 MIME-Version: 1.0 In-Reply-To: <201705160447.v4G4lpJd018173@repo.freebsd.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 May 2017 04:32:48 -0000 On 16.05.2017 6:47, Luiz Otavio O Souza wrote: > Author: loos > Date: Tue May 16 04:47:50 2017 > New Revision: 318336 > URL: https://svnweb.freebsd.org/changeset/base/318336 > > Log: > Add the SDHCI Address Decoder registers and routines for ARMADA 38X. > > Tested on: ClearFog Pro > Reviewed by: Marcin Wojtas > Sponsored by: Rubicon Communications, LLC (Netgate) > Differential Revision: https://reviews.freebsd.org/D10601 > This commit breaks many of ARMv6 kernels. ARMADAXP, DB-78XXX, DB-88F5XXX, DB-88F6XXX, TS7800, LINT. Michal > Modified: > head/sys/arm/mv/mv_common.c > head/sys/arm/mv/mvwin.h > > Modified: head/sys/arm/mv/mv_common.c > ============================================================================== > --- head/sys/arm/mv/mv_common.c Tue May 16 03:31:49 2017 (r318335) > +++ head/sys/arm/mv/mv_common.c Tue May 16 04:47:50 2017 (r318336) > @@ -82,6 +82,7 @@ static int decode_win_usb3_valid(void); > static int decode_win_eth_valid(void); > static int decode_win_pcie_valid(void); > static int decode_win_sata_valid(void); > +static int decode_win_sdhci_valid(void); > > static int decode_win_idma_valid(void); > static int decode_win_xor_valid(void); > @@ -95,6 +96,7 @@ static void decode_win_usb3_setup(u_long > static void decode_win_eth_setup(u_long); > static void decode_win_sata_setup(u_long); > static void decode_win_ahci_setup(u_long); > +static void decode_win_sdhci_setup(u_long); > > static void decode_win_idma_setup(u_long); > static void decode_win_xor_setup(u_long); > @@ -105,6 +107,7 @@ static void decode_win_eth_dump(u_long b > static void decode_win_idma_dump(u_long base); > static void decode_win_xor_dump(u_long base); > static void decode_win_ahci_dump(u_long base); > +static void decode_win_sdhci_dump(u_long); > > static int fdt_get_ranges(const char *, void *, int, int *, int *); > #ifdef SOC_MV_ARMADA38X > @@ -138,6 +141,7 @@ static struct soc_node_spec soc_nodes[] > { "mrvl,usb-ehci", &decode_win_usb_setup, &decode_win_usb_dump }, > { "marvell,armada-380-xhci", &decode_win_usb3_setup, &decode_win_usb3_dump }, > { "marvell,armada-380-ahci", &decode_win_ahci_setup, &decode_win_ahci_dump }, > + { "marvell,armada-380-sdhci", &decode_win_sdhci_setup, &decode_win_sdhci_dump }, > { "mrvl,sata", &decode_win_sata_setup, NULL }, > { "mrvl,xor", &decode_win_xor_setup, &decode_win_xor_dump }, > { "mrvl,idma", &decode_win_idma_setup, &decode_win_idma_dump }, > @@ -568,7 +572,8 @@ soc_decode_win(void) > if (!decode_win_cpu_valid() || !decode_win_usb_valid() || > !decode_win_eth_valid() || !decode_win_idma_valid() || > !decode_win_pcie_valid() || !decode_win_sata_valid() || > - !decode_win_xor_valid() || !decode_win_usb3_valid()) > + !decode_win_xor_valid() || !decode_win_usb3_valid() || > + !decode_win_sdhci_valid()) > return (EINVAL); > > decode_win_cpu_setup(); > @@ -659,6 +664,11 @@ WIN_REG_BASE_IDX_RD(win_sata, sz, MV_WIN > WIN_REG_BASE_IDX_WR(win_sata, sz, MV_WIN_SATA_SIZE); > #endif > > +WIN_REG_BASE_IDX_RD(win_sdhci, cr, MV_WIN_SDHCI_CTRL); > +WIN_REG_BASE_IDX_RD(win_sdhci, br, MV_WIN_SDHCI_BASE); > +WIN_REG_BASE_IDX_WR(win_sdhci, cr, MV_WIN_SDHCI_CTRL); > +WIN_REG_BASE_IDX_WR(win_sdhci, br, MV_WIN_SDHCI_BASE); > + > #ifndef SOC_MV_DOVE > WIN_REG_IDX_RD(ddr, br, MV_WIN_DDR_BASE, MV_DDR_CADR_BASE) > WIN_REG_IDX_RD(ddr, sz, MV_WIN_DDR_SIZE, MV_DDR_CADR_BASE) > @@ -2073,6 +2083,60 @@ decode_win_sata_valid(void) > return (decode_win_can_cover_ddr(MV_WIN_SATA_MAX)); > } > > +static void > +decode_win_sdhci_setup(u_long base) > +{ > + uint32_t cr, br; > + int i, j; > + > + for (i = 0; i < MV_WIN_SDHCI_MAX; i++) { > + win_sdhci_cr_write(base, i, 0); > + win_sdhci_br_write(base, i, 0); > + } > + > + for (i = 0; i < MV_WIN_DDR_MAX; i++) > + if (ddr_is_active(i)) { > + br = ddr_base(i); > + cr = (((ddr_size(i) - 1) & > + (IO_WIN_SIZE_MASK << IO_WIN_SIZE_SHIFT)) | > + (ddr_attr(i) << IO_WIN_ATTR_SHIFT) | > + (ddr_target(i) << IO_WIN_TGT_SHIFT) | > + IO_WIN_ENA_MASK); > + > + /* Use the first available SDHCI window */ > + for (j = 0; j < MV_WIN_SDHCI_MAX; j++) { > + if (win_sdhci_cr_read(base, j) & IO_WIN_ENA_MASK) > + continue; > + > + win_sdhci_cr_write(base, j, cr); > + win_sdhci_br_write(base, j, br); > + break; > + } > + } > +} > + > +static void > +decode_win_sdhci_dump(u_long base) > +{ > + int i; > + > + for (i = 0; i < MV_WIN_SDHCI_MAX; i++) > + printf("SDHCI window#%d: c 0x%08x, b 0x%08x\n", i, > + win_sdhci_cr_read(base, i), win_sdhci_br_read(base, i)); > +} > + > +static int > +decode_win_sdhci_valid(void) > +{ > + > +#ifdef SOC_MV_ARMADA38X > + return (decode_win_can_cover_ddr(MV_WIN_SDHCI_MAX)); > +#endif > + > + /* Satisfy platforms not equipped with this controller. */ > + return (1); > +} > + > /************************************************************************** > * FDT parsing routines. > **************************************************************************/ > > Modified: head/sys/arm/mv/mvwin.h > ============================================================================== > --- head/sys/arm/mv/mvwin.h Tue May 16 03:31:49 2017 (r318335) > +++ head/sys/arm/mv/mvwin.h Tue May 16 04:47:50 2017 (r318336) > @@ -296,6 +296,10 @@ > #define MV_WIN_SATA_MAX 4 > #endif > > +#define MV_WIN_SDHCI_CTRL(n) (0x8 * (n) + 0x4080) > +#define MV_WIN_SDHCI_BASE(n) (0x8 * (n) + 0x4084) > +#define MV_WIN_SDHCI_MAX 8 > + > #if defined(SOC_MV_ARMADA38X) > #define MV_BOOTROM_MEM_ADDR 0xFFF00000 > #define MV_BOOTROM_WIN_SIZE 0xF >