Date: Tue, 16 May 2017 19:46:53 +0000 (UTC) From: Dimitry Andric <dim@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-vendor@freebsd.org Subject: svn commit: r318368 - in vendor/llvm/dist: . cmake cmake/modules docs include/llvm include/llvm/ADT include/llvm/Analysis include/llvm/Bitcode include/llvm/CodeGen include/llvm/CodeGen/GlobalISel i... Message-ID: <201705161946.v4GJkrP6096799@repo.freebsd.org>
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Author: dim Date: Tue May 16 19:46:52 2017 New Revision: 318368 URL: https://svnweb.freebsd.org/changeset/base/318368 Log: Vendor import of llvm trunk r303197: https://llvm.org/svn/llvm-project/llvm/trunk@303197 Added: vendor/llvm/dist/include/llvm/CodeGen/ExpandReductions.h (contents, props changed) vendor/llvm/dist/include/llvm/DebugInfo/CodeView/RandomAccessTypeVisitor.h (contents, props changed) vendor/llvm/dist/include/llvm/Support/Parallel.h (contents, props changed) vendor/llvm/dist/include/llvm/ToolDrivers/ vendor/llvm/dist/include/llvm/ToolDrivers/llvm-lib/ vendor/llvm/dist/include/llvm/ToolDrivers/llvm-lib/LibDriver.h (contents, props changed) vendor/llvm/dist/lib/CodeGen/ExpandReductions.cpp (contents, props changed) vendor/llvm/dist/lib/CodeGen/LiveRangeShrink.cpp (contents, props changed) vendor/llvm/dist/lib/CodeGen/ScalarizeMaskedMemIntrin.cpp (contents, props changed) vendor/llvm/dist/lib/DebugInfo/CodeView/RandomAccessTypeVisitor.cpp (contents, props changed) vendor/llvm/dist/lib/Fuzzer/test/OverwriteInputTest.cpp (contents, props changed) vendor/llvm/dist/lib/Fuzzer/test/afl-driver.test vendor/llvm/dist/lib/Fuzzer/test/overwrite-input.test vendor/llvm/dist/lib/Support/Parallel.cpp (contents, props changed) vendor/llvm/dist/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp (contents, props changed) vendor/llvm/dist/lib/ToolDrivers/ vendor/llvm/dist/lib/ToolDrivers/CMakeLists.txt (contents, props changed) vendor/llvm/dist/lib/ToolDrivers/LLVMBuild.txt (contents, props changed) vendor/llvm/dist/lib/ToolDrivers/llvm-lib/ vendor/llvm/dist/lib/ToolDrivers/llvm-lib/CMakeLists.txt (contents, props changed) vendor/llvm/dist/lib/ToolDrivers/llvm-lib/LLVMBuild.txt (contents, props changed) vendor/llvm/dist/lib/ToolDrivers/llvm-lib/LibDriver.cpp (contents, props changed) vendor/llvm/dist/lib/ToolDrivers/llvm-lib/Options.td vendor/llvm/dist/test/Analysis/BasicAA/cs-cs-arm.ll vendor/llvm/dist/test/Analysis/BasicAA/intrinsics-arm.ll vendor/llvm/dist/test/Analysis/CostModel/AArch64/free-widening-casts.ll vendor/llvm/dist/test/Analysis/CostModel/AMDGPU/shufflevector.ll vendor/llvm/dist/test/Analysis/ScalarEvolution/different-loops-recs.ll vendor/llvm/dist/test/Assembler/globalvariable-attributes.ll vendor/llvm/dist/test/Bitcode/globalvariable-attributes.ll vendor/llvm/dist/test/Bitcode/thinlto-function-summary-callgraph-sample-profile-summary.ll vendor/llvm/dist/test/CodeGen/AArch64/macho-global-symbols.ll vendor/llvm/dist/test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir vendor/llvm/dist/test/CodeGen/AMDGPU/GlobalISel/lit.local.cfg vendor/llvm/dist/test/CodeGen/AVR/select-mbb-placement-bug.ll vendor/llvm/dist/test/CodeGen/Generic/expand-experimental-reductions.ll vendor/llvm/dist/test/CodeGen/Lanai/masking_setccs.ll vendor/llvm/dist/test/CodeGen/MIR/ARM/PR32721_ifcvt_triangle_unanalyzable.mir vendor/llvm/dist/test/CodeGen/MIR/ARM/ifcvt_canFallThroughTo.mir vendor/llvm/dist/test/CodeGen/MSP430/hwmult16.ll vendor/llvm/dist/test/CodeGen/MSP430/hwmult32.ll vendor/llvm/dist/test/CodeGen/MSP430/hwmultf5.ll vendor/llvm/dist/test/CodeGen/MSP430/libcalls.ll vendor/llvm/dist/test/CodeGen/MSP430/promote-i8-mul.ll vendor/llvm/dist/test/CodeGen/PowerPC/mtvsrdd.ll vendor/llvm/dist/test/CodeGen/PowerPC/testComparesieqsc.ll vendor/llvm/dist/test/CodeGen/PowerPC/testComparesieqsi.ll vendor/llvm/dist/test/CodeGen/PowerPC/testComparesieqss.ll vendor/llvm/dist/test/CodeGen/PowerPC/testComparesiequc.ll vendor/llvm/dist/test/CodeGen/PowerPC/testComparesiequi.ll vendor/llvm/dist/test/CodeGen/PowerPC/testComparesiequs.ll vendor/llvm/dist/test/CodeGen/PowerPC/testCompareslleqsc.ll vendor/llvm/dist/test/CodeGen/PowerPC/testCompareslleqsi.ll vendor/llvm/dist/test/CodeGen/PowerPC/testCompareslleqss.ll vendor/llvm/dist/test/CodeGen/PowerPC/testComparesllequc.ll vendor/llvm/dist/test/CodeGen/PowerPC/testComparesllequi.ll vendor/llvm/dist/test/CodeGen/PowerPC/testComparesllequs.ll vendor/llvm/dist/test/CodeGen/SPARC/inlineasm-v9.ll vendor/llvm/dist/test/CodeGen/SystemZ/list-ilp-crash.ll vendor/llvm/dist/test/CodeGen/SystemZ/lower-copy-undef-src.mir vendor/llvm/dist/test/CodeGen/X86/GlobalISel/add-scalar.ll vendor/llvm/dist/test/CodeGen/X86/GlobalISel/br.ll vendor/llvm/dist/test/CodeGen/X86/GlobalISel/cmp.ll vendor/llvm/dist/test/CodeGen/X86/GlobalISel/legalize-cmp.mir vendor/llvm/dist/test/CodeGen/X86/GlobalISel/memop-scalar-x32.ll vendor/llvm/dist/test/CodeGen/X86/GlobalISel/memop-scalar.ll vendor/llvm/dist/test/CodeGen/X86/GlobalISel/memop-vec.ll vendor/llvm/dist/test/CodeGen/X86/GlobalISel/select-br.mir vendor/llvm/dist/test/CodeGen/X86/GlobalISel/select-cmp.mir vendor/llvm/dist/test/CodeGen/X86/GlobalISel/select-memop-scalar-x32.mir vendor/llvm/dist/test/CodeGen/X86/GlobalISel/select-memop-scalar.mir vendor/llvm/dist/test/CodeGen/X86/GlobalISel/select-memop-v128.mir vendor/llvm/dist/test/CodeGen/X86/O0-pipeline.ll vendor/llvm/dist/test/CodeGen/X86/avx512-scalar_mask.ll vendor/llvm/dist/test/CodeGen/X86/avx512-vselect.ll vendor/llvm/dist/test/CodeGen/X86/leaFixup32.mir vendor/llvm/dist/test/CodeGen/X86/leaFixup64.mir vendor/llvm/dist/test/CodeGen/X86/lrshrink.ll vendor/llvm/dist/test/CodeGen/X86/replace_unsupported_masked_mem_intrin.ll vendor/llvm/dist/test/CodeGen/X86/vector-narrow-binop.ll vendor/llvm/dist/test/DebugInfo/COFF/no-cus.ll vendor/llvm/dist/test/DebugInfo/Inputs/typeunit-header.elf-x86-64 (contents, props changed) vendor/llvm/dist/test/DebugInfo/Inputs/typeunit-header.s (contents, props changed) vendor/llvm/dist/test/DebugInfo/X86/dbg-declare-inalloca.ll vendor/llvm/dist/test/DebugInfo/typeunit-header.test vendor/llvm/dist/test/Instrumentation/MemorySanitizer/msan_x86intrinsics.ll vendor/llvm/dist/test/Instrumentation/MemorySanitizer/pr32842.ll vendor/llvm/dist/test/LTO/Resolution/X86/ifunc.ll vendor/llvm/dist/test/MC/AArch64/directive-cpu-err.s (contents, props changed) vendor/llvm/dist/test/MC/AsmParser/altmacro_string_escape.s (contents, props changed) vendor/llvm/dist/test/MC/Disassembler/PowerPC/ppc64-encoding-p9vector.txt (contents, props changed) vendor/llvm/dist/test/Object/Inputs/COFF/empty-drectve.yaml vendor/llvm/dist/test/Object/X86/archive-symbol-table.s (contents, props changed) vendor/llvm/dist/test/Object/coff-empty-drectve.test vendor/llvm/dist/test/Object/wasm-invalid-start.test vendor/llvm/dist/test/TableGen/RegisterEncoder.td vendor/llvm/dist/test/Transforms/CodeExtractor/PartialInlineEntryUpdate.ll vendor/llvm/dist/test/Transforms/CodeExtractor/PartialInlineHighCost.ll vendor/llvm/dist/test/Transforms/CodeGenPrepare/section-samplepgo.ll vendor/llvm/dist/test/Transforms/ConstProp/calls-math-finite.ll vendor/llvm/dist/test/Transforms/ConstProp/sse.ll vendor/llvm/dist/test/Transforms/Coroutines/coro-eh-aware-edge-split.ll vendor/llvm/dist/test/Transforms/GVN/PRE/nonintegral.ll vendor/llvm/dist/test/Transforms/InstCombine/AArch64/ vendor/llvm/dist/test/Transforms/InstCombine/AArch64/2012-04-23-Neon-Intrinsics.ll vendor/llvm/dist/test/Transforms/InstCombine/AArch64/lit.local.cfg vendor/llvm/dist/test/Transforms/InstCombine/AMDGPU/ vendor/llvm/dist/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll vendor/llvm/dist/test/Transforms/InstCombine/AMDGPU/lit.local.cfg vendor/llvm/dist/test/Transforms/InstCombine/ARM/2012-04-23-Neon-Intrinsics.ll vendor/llvm/dist/test/Transforms/InstCombine/ARM/constant-fold-hang.ll vendor/llvm/dist/test/Transforms/InstCombine/ARM/lit.local.cfg vendor/llvm/dist/test/Transforms/InstCombine/ARM/neon-intrinsics.ll vendor/llvm/dist/test/Transforms/InstCombine/PowerPC/ vendor/llvm/dist/test/Transforms/InstCombine/PowerPC/aligned-altivec.ll vendor/llvm/dist/test/Transforms/InstCombine/PowerPC/aligned-qpx.ll vendor/llvm/dist/test/Transforms/InstCombine/PowerPC/lit.local.cfg vendor/llvm/dist/test/Transforms/InstCombine/PowerPC/vsx-unaligned.ll vendor/llvm/dist/test/Transforms/InstCombine/X86/ vendor/llvm/dist/test/Transforms/InstCombine/X86/X86FsubCmpCombine.ll vendor/llvm/dist/test/Transforms/InstCombine/X86/blend_x86.ll vendor/llvm/dist/test/Transforms/InstCombine/X86/lit.local.cfg vendor/llvm/dist/test/Transforms/InstCombine/X86/pr2645-1.ll vendor/llvm/dist/test/Transforms/InstCombine/X86/shufflemask-undef.ll vendor/llvm/dist/test/Transforms/InstCombine/X86/x86-avx2.ll vendor/llvm/dist/test/Transforms/InstCombine/X86/x86-avx512.ll vendor/llvm/dist/test/Transforms/InstCombine/X86/x86-crc32-demanded.ll vendor/llvm/dist/test/Transforms/InstCombine/X86/x86-f16c.ll vendor/llvm/dist/test/Transforms/InstCombine/X86/x86-fma.ll vendor/llvm/dist/test/Transforms/InstCombine/X86/x86-insertps.ll vendor/llvm/dist/test/Transforms/InstCombine/X86/x86-masked-memops.ll vendor/llvm/dist/test/Transforms/InstCombine/X86/x86-movmsk.ll vendor/llvm/dist/test/Transforms/InstCombine/X86/x86-muldq.ll vendor/llvm/dist/test/Transforms/InstCombine/X86/x86-pack.ll vendor/llvm/dist/test/Transforms/InstCombine/X86/x86-pshufb.ll vendor/llvm/dist/test/Transforms/InstCombine/X86/x86-sse.ll vendor/llvm/dist/test/Transforms/InstCombine/X86/x86-sse2.ll vendor/llvm/dist/test/Transforms/InstCombine/X86/x86-sse41.ll vendor/llvm/dist/test/Transforms/InstCombine/X86/x86-sse4a.ll vendor/llvm/dist/test/Transforms/InstCombine/X86/x86-vec_demanded_elts.ll vendor/llvm/dist/test/Transforms/InstCombine/X86/x86-vector-shifts.ll vendor/llvm/dist/test/Transforms/InstCombine/X86/x86-vperm2.ll vendor/llvm/dist/test/Transforms/InstCombine/X86/x86-vpermil.ll vendor/llvm/dist/test/Transforms/InstCombine/X86/x86-xop.ll vendor/llvm/dist/test/Transforms/InstCombine/constant-fold-iteration.ll vendor/llvm/dist/test/Transforms/InstNamer/ vendor/llvm/dist/test/Transforms/InstNamer/basic.ll vendor/llvm/dist/test/Transforms/InstSimplify/or.ll vendor/llvm/dist/test/Transforms/LoopIdiom/ARM/ vendor/llvm/dist/test/Transforms/LoopIdiom/ARM/ctlz.ll vendor/llvm/dist/test/Transforms/LoopIdiom/X86/ctlz.ll vendor/llvm/dist/test/Transforms/LoopVectorize/X86/svml-calls-finite.ll vendor/llvm/dist/test/Transforms/LoopVectorize/pr32859.ll vendor/llvm/dist/test/Transforms/NewGVN/pr32934.ll vendor/llvm/dist/test/Transforms/NewGVN/pr32952.ll vendor/llvm/dist/test/Transforms/NewGVN/verify-memoryphi.ll vendor/llvm/dist/test/Transforms/SLPVectorizer/AArch64/64-bit-vector.ll vendor/llvm/dist/test/Transforms/SLPVectorizer/AArch64/remarks.ll vendor/llvm/dist/test/Transforms/SLPVectorizer/X86/arith-add.ll vendor/llvm/dist/test/Transforms/SLPVectorizer/X86/arith-mul.ll vendor/llvm/dist/test/Transforms/SLPVectorizer/X86/arith-sub.ll vendor/llvm/dist/test/Transforms/SLPVectorizer/X86/shift-ashr.ll vendor/llvm/dist/test/Transforms/SLPVectorizer/X86/shift-lshr.ll vendor/llvm/dist/test/Transforms/SLPVectorizer/X86/shift-shl.ll vendor/llvm/dist/test/tools/llvm-pdbdump/symbol-filters.test vendor/llvm/dist/test/tools/llvm-readobj/wasm-invalid.test vendor/llvm/dist/unittests/DebugInfo/CodeView/ vendor/llvm/dist/unittests/DebugInfo/CodeView/CMakeLists.txt (contents, props changed) vendor/llvm/dist/unittests/DebugInfo/CodeView/ErrorChecking.h (contents, props changed) vendor/llvm/dist/unittests/DebugInfo/CodeView/RandomAccessVisitorTest.cpp (contents, props changed) vendor/llvm/dist/unittests/Support/ParallelTest.cpp (contents, props changed) vendor/llvm/dist/utils/vscode/ vendor/llvm/dist/utils/vscode/README vendor/llvm/dist/utils/vscode/tablegen/ vendor/llvm/dist/utils/vscode/tablegen/.vscode/ vendor/llvm/dist/utils/vscode/tablegen/.vscode/launch.json vendor/llvm/dist/utils/vscode/tablegen/CHANGELOG.md vendor/llvm/dist/utils/vscode/tablegen/README.md vendor/llvm/dist/utils/vscode/tablegen/language-configuration.json vendor/llvm/dist/utils/vscode/tablegen/package.json vendor/llvm/dist/utils/vscode/tablegen/syntaxes/ vendor/llvm/dist/utils/vscode/tablegen/syntaxes/TableGen.tmLanguage vendor/llvm/dist/utils/vscode/tablegen/vsc-extension-quickstart.md Deleted: vendor/llvm/dist/include/llvm/LibDriver/ vendor/llvm/dist/lib/DebugInfo/CodeView/ModuleDebugUnknownFragment.cpp vendor/llvm/dist/lib/LibDriver/ vendor/llvm/dist/test/CodeGen/MSP430/2009-11-05-8BitLibcalls.ll vendor/llvm/dist/test/CodeGen/X86/2012-11-30-handlemove-dbg.ll vendor/llvm/dist/test/CodeGen/X86/2012-11-30-misched-dbg.ll vendor/llvm/dist/test/CodeGen/X86/2012-11-30-regpres-dbg.ll vendor/llvm/dist/test/CodeGen/X86/GlobalISel/memop-x32.ll vendor/llvm/dist/test/CodeGen/X86/GlobalISel/memop.ll vendor/llvm/dist/test/CodeGen/X86/GlobalISel/select-memop-x32.mir vendor/llvm/dist/test/CodeGen/X86/GlobalISel/select-memop.mir vendor/llvm/dist/test/Transforms/InstCombine/2012-04-23-Neon-Intrinsics.ll vendor/llvm/dist/test/Transforms/InstCombine/X86FsubCmpCombine.ll vendor/llvm/dist/test/Transforms/InstCombine/aligned-altivec.ll vendor/llvm/dist/test/Transforms/InstCombine/aligned-qpx.ll vendor/llvm/dist/test/Transforms/InstCombine/amdgcn-intrinsics.ll vendor/llvm/dist/test/Transforms/InstCombine/bit-tracking.ll vendor/llvm/dist/test/Transforms/InstCombine/blend_x86.ll vendor/llvm/dist/test/Transforms/InstCombine/constant-fold-hang.ll vendor/llvm/dist/test/Transforms/InstCombine/neon-intrinsics.ll vendor/llvm/dist/test/Transforms/InstCombine/pr2645-1.ll vendor/llvm/dist/test/Transforms/InstCombine/shufflemask-undef.ll vendor/llvm/dist/test/Transforms/InstCombine/vsx-unaligned.ll vendor/llvm/dist/test/Transforms/InstCombine/x86-avx2.ll vendor/llvm/dist/test/Transforms/InstCombine/x86-avx512.ll vendor/llvm/dist/test/Transforms/InstCombine/x86-crc32-demanded.ll vendor/llvm/dist/test/Transforms/InstCombine/x86-f16c.ll vendor/llvm/dist/test/Transforms/InstCombine/x86-fma.ll vendor/llvm/dist/test/Transforms/InstCombine/x86-insertps.ll vendor/llvm/dist/test/Transforms/InstCombine/x86-masked-memops.ll vendor/llvm/dist/test/Transforms/InstCombine/x86-movmsk.ll vendor/llvm/dist/test/Transforms/InstCombine/x86-muldq.ll vendor/llvm/dist/test/Transforms/InstCombine/x86-pack.ll vendor/llvm/dist/test/Transforms/InstCombine/x86-pshufb.ll vendor/llvm/dist/test/Transforms/InstCombine/x86-sse.ll vendor/llvm/dist/test/Transforms/InstCombine/x86-sse2.ll vendor/llvm/dist/test/Transforms/InstCombine/x86-sse41.ll vendor/llvm/dist/test/Transforms/InstCombine/x86-sse4a.ll vendor/llvm/dist/test/Transforms/InstCombine/x86-vector-shifts.ll vendor/llvm/dist/test/Transforms/InstCombine/x86-vperm2.ll vendor/llvm/dist/test/Transforms/InstCombine/x86-vpermil.ll vendor/llvm/dist/test/Transforms/InstCombine/x86-xop.ll vendor/llvm/dist/test/Transforms/InstSimplify/apint-or.ll vendor/llvm/dist/test/Transforms/SpeculativeExecution/spec-other.ll vendor/llvm/dist/test/Transforms/SpeculativeExecution/spec-vector.ll Modified: vendor/llvm/dist/CREDITS.TXT vendor/llvm/dist/cmake/config-ix.cmake vendor/llvm/dist/cmake/modules/AddSphinxTarget.cmake vendor/llvm/dist/docs/CMakeLists.txt vendor/llvm/dist/docs/GettingStarted.rst vendor/llvm/dist/docs/LangRef.rst vendor/llvm/dist/docs/Lexicon.rst vendor/llvm/dist/docs/LibFuzzer.rst vendor/llvm/dist/docs/ReleaseNotes.rst vendor/llvm/dist/include/llvm/ADT/APInt.h vendor/llvm/dist/include/llvm/ADT/BitVector.h vendor/llvm/dist/include/llvm/ADT/STLExtras.h vendor/llvm/dist/include/llvm/ADT/StringExtras.h vendor/llvm/dist/include/llvm/Analysis/CallGraph.h vendor/llvm/dist/include/llvm/Analysis/ProfileSummaryInfo.h vendor/llvm/dist/include/llvm/Analysis/ScalarEvolution.h vendor/llvm/dist/include/llvm/Analysis/TargetLibraryInfo.def vendor/llvm/dist/include/llvm/Analysis/TargetTransformInfo.h vendor/llvm/dist/include/llvm/Analysis/TargetTransformInfoImpl.h vendor/llvm/dist/include/llvm/Analysis/ValueTracking.h vendor/llvm/dist/include/llvm/Bitcode/BitcodeReader.h vendor/llvm/dist/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h vendor/llvm/dist/include/llvm/CodeGen/GlobalISel/Utils.h vendor/llvm/dist/include/llvm/CodeGen/ISDOpcodes.h vendor/llvm/dist/include/llvm/CodeGen/MachineCombinerPattern.h vendor/llvm/dist/include/llvm/CodeGen/Passes.h vendor/llvm/dist/include/llvm/CodeGen/SelectionDAG.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/CVTypeVisitor.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/TypeDatabase.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/TypeDatabaseVisitor.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/TypeDeserializer.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/TypeDumpVisitor.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/TypeIndex.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/TypeVisitorCallbackPipeline.h vendor/llvm/dist/include/llvm/DebugInfo/CodeView/TypeVisitorCallbacks.h vendor/llvm/dist/include/llvm/DebugInfo/DWARF/DWARFContext.h vendor/llvm/dist/include/llvm/DebugInfo/DWARF/DWARFDebugLine.h vendor/llvm/dist/include/llvm/DebugInfo/DWARF/DWARFDebugRangeList.h vendor/llvm/dist/include/llvm/DebugInfo/DWARF/DWARFRelocMap.h vendor/llvm/dist/include/llvm/DebugInfo/DWARF/DWARFVerifier.h vendor/llvm/dist/include/llvm/DebugInfo/PDB/Native/RawTypes.h vendor/llvm/dist/include/llvm/DebugInfo/PDB/Native/TpiStream.h vendor/llvm/dist/include/llvm/DebugInfo/PDB/Native/TpiStreamBuilder.h vendor/llvm/dist/include/llvm/ExecutionEngine/Orc/CompileOnDemandLayer.h vendor/llvm/dist/include/llvm/ExecutionEngine/Orc/OrcRemoteTargetClient.h vendor/llvm/dist/include/llvm/ExecutionEngine/Orc/RTDyldObjectLinkingLayer.h vendor/llvm/dist/include/llvm/ExecutionEngine/RTDyldMemoryManager.h vendor/llvm/dist/include/llvm/ExecutionEngine/RuntimeDyld.h vendor/llvm/dist/include/llvm/IR/Attributes.h vendor/llvm/dist/include/llvm/IR/CallingConv.h vendor/llvm/dist/include/llvm/IR/Constants.h vendor/llvm/dist/include/llvm/IR/DebugInfoMetadata.h vendor/llvm/dist/include/llvm/IR/DebugLoc.h vendor/llvm/dist/include/llvm/IR/DerivedTypes.h vendor/llvm/dist/include/llvm/IR/DiagnosticInfo.h vendor/llvm/dist/include/llvm/IR/Function.h vendor/llvm/dist/include/llvm/IR/GetElementPtrTypeIterator.h vendor/llvm/dist/include/llvm/IR/GlobalAlias.h vendor/llvm/dist/include/llvm/IR/GlobalIFunc.h vendor/llvm/dist/include/llvm/IR/GlobalObject.h vendor/llvm/dist/include/llvm/IR/GlobalValue.h vendor/llvm/dist/include/llvm/IR/GlobalVariable.h vendor/llvm/dist/include/llvm/IR/IRBuilder.h vendor/llvm/dist/include/llvm/IR/InstrTypes.h vendor/llvm/dist/include/llvm/IR/Instruction.h vendor/llvm/dist/include/llvm/IR/Instructions.h vendor/llvm/dist/include/llvm/IR/Intrinsics.td vendor/llvm/dist/include/llvm/IR/LLVMContext.h vendor/llvm/dist/include/llvm/IR/LegacyPassManager.h vendor/llvm/dist/include/llvm/IR/Module.h vendor/llvm/dist/include/llvm/IR/ModuleSummaryIndex.h vendor/llvm/dist/include/llvm/IR/PassManager.h vendor/llvm/dist/include/llvm/IR/PassManagerInternal.h vendor/llvm/dist/include/llvm/IR/PatternMatch.h vendor/llvm/dist/include/llvm/IR/ProfileSummary.h vendor/llvm/dist/include/llvm/IR/Statepoint.h vendor/llvm/dist/include/llvm/IR/SymbolTableListTraits.h vendor/llvm/dist/include/llvm/IR/TrackingMDRef.h vendor/llvm/dist/include/llvm/IR/Type.h vendor/llvm/dist/include/llvm/IR/TypeFinder.h vendor/llvm/dist/include/llvm/IR/Use.h vendor/llvm/dist/include/llvm/IR/UseListOrder.h vendor/llvm/dist/include/llvm/IR/User.h vendor/llvm/dist/include/llvm/IR/Value.h vendor/llvm/dist/include/llvm/IR/ValueHandle.h vendor/llvm/dist/include/llvm/IR/ValueMap.h vendor/llvm/dist/include/llvm/IR/ValueSymbolTable.h vendor/llvm/dist/include/llvm/IR/Verifier.h vendor/llvm/dist/include/llvm/InitializePasses.h vendor/llvm/dist/include/llvm/LinkAllPasses.h vendor/llvm/dist/include/llvm/Object/Wasm.h vendor/llvm/dist/include/llvm/ObjectYAML/WasmYAML.h vendor/llvm/dist/include/llvm/ProfileData/SampleProfWriter.h vendor/llvm/dist/include/llvm/Support/BinaryStreamArray.h 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vendor/llvm/dist/lib/Analysis/ModuleSummaryAnalysis.cpp vendor/llvm/dist/lib/Analysis/OptimizationDiagnosticInfo.cpp vendor/llvm/dist/lib/Analysis/ProfileSummaryInfo.cpp vendor/llvm/dist/lib/Analysis/ScalarEvolution.cpp vendor/llvm/dist/lib/Analysis/TargetLibraryInfo.cpp vendor/llvm/dist/lib/Analysis/TargetTransformInfo.cpp vendor/llvm/dist/lib/Analysis/ValueTracking.cpp vendor/llvm/dist/lib/Analysis/VectorUtils.cpp vendor/llvm/dist/lib/AsmParser/LLParser.cpp vendor/llvm/dist/lib/Bitcode/Reader/BitcodeReader.cpp vendor/llvm/dist/lib/Bitcode/Reader/MetadataLoader.cpp vendor/llvm/dist/lib/Bitcode/Writer/BitcodeWriter.cpp vendor/llvm/dist/lib/Bitcode/Writer/ValueEnumerator.cpp vendor/llvm/dist/lib/CMakeLists.txt vendor/llvm/dist/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp vendor/llvm/dist/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp vendor/llvm/dist/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp vendor/llvm/dist/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h 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vendor/llvm/dist/unittests/ExecutionEngine/Orc/ObjectTransformLayerTest.cpp vendor/llvm/dist/unittests/ExecutionEngine/Orc/OrcTestCommon.h vendor/llvm/dist/unittests/ExecutionEngine/Orc/RTDyldObjectLinkingLayerTest.cpp vendor/llvm/dist/unittests/IR/ConstantRangeTest.cpp vendor/llvm/dist/unittests/IR/InstructionsTest.cpp vendor/llvm/dist/unittests/IR/TypeBuilderTest.cpp vendor/llvm/dist/unittests/Support/CMakeLists.txt vendor/llvm/dist/unittests/Support/DynamicLibrary/DynamicLibraryTest.cpp vendor/llvm/dist/unittests/Support/Path.cpp vendor/llvm/dist/unittests/Transforms/Utils/Cloning.cpp vendor/llvm/dist/utils/TableGen/CodeGenInstruction.cpp vendor/llvm/dist/utils/TableGen/SubtargetEmitter.cpp vendor/llvm/dist/utils/TableGen/X86RecognizableInstr.cpp vendor/llvm/dist/utils/TableGen/X86RecognizableInstr.h vendor/llvm/dist/utils/git-svn/git-llvm vendor/llvm/dist/utils/release/build_llvm_package.bat Modified: vendor/llvm/dist/CREDITS.TXT ============================================================================== --- vendor/llvm/dist/CREDITS.TXT Tue May 16 19:35:25 2017 (r318367) +++ vendor/llvm/dist/CREDITS.TXT Tue May 16 19:46:52 2017 (r318368) @@ -265,7 +265,7 @@ D: Release manager (1.7+) N: Sylvestre Ledru E: sylvestre@debian.org W: http://sylvestre.ledru.info/ -W: http://llvm.org/apt/ +W: http://apt.llvm.org/ D: Debian and Ubuntu packaging D: Continuous integration with jenkins Modified: vendor/llvm/dist/cmake/config-ix.cmake ============================================================================== --- vendor/llvm/dist/cmake/config-ix.cmake Tue May 16 19:35:25 2017 (r318367) +++ vendor/llvm/dist/cmake/config-ix.cmake Tue May 16 19:46:52 2017 (r318368) @@ -530,16 +530,6 @@ else() message(STATUS "Doxygen disabled.") endif() -if (LLVM_ENABLE_SPHINX) - message(STATUS "Sphinx enabled.") - find_package(Sphinx REQUIRED) - if (LLVM_BUILD_DOCS) - add_custom_target(sphinx ALL) - endif() -else() - message(STATUS "Sphinx disabled.") -endif() - set(LLVM_BINDINGS "") if(WIN32) message(STATUS "Go bindings disabled.") Modified: vendor/llvm/dist/cmake/modules/AddSphinxTarget.cmake ============================================================================== --- vendor/llvm/dist/cmake/modules/AddSphinxTarget.cmake Tue May 16 19:35:25 2017 (r318367) +++ vendor/llvm/dist/cmake/modules/AddSphinxTarget.cmake Tue May 16 19:46:52 2017 (r318368) @@ -1,3 +1,16 @@ + +# Create sphinx target +if (LLVM_ENABLE_SPHINX) + message(STATUS "Sphinx enabled.") + find_package(Sphinx REQUIRED) + if (LLVM_BUILD_DOCS AND NOT TARGET sphinx) + add_custom_target(sphinx ALL) + endif() +else() + message(STATUS "Sphinx disabled.") +endif() + + # Handy function for creating the different Sphinx targets. # # ``builder`` should be one of the supported builders used by Modified: vendor/llvm/dist/docs/CMakeLists.txt ============================================================================== --- vendor/llvm/dist/docs/CMakeLists.txt Tue May 16 19:35:25 2017 (r318367) +++ vendor/llvm/dist/docs/CMakeLists.txt Tue May 16 19:46:52 2017 (r318368) @@ -103,8 +103,8 @@ endif() endif() if (LLVM_ENABLE_SPHINX) + include(AddSphinxTarget) if (SPHINX_FOUND) - include(AddSphinxTarget) if (${SPHINX_OUTPUT_HTML}) add_sphinx_target(html llvm) endif() Modified: vendor/llvm/dist/docs/GettingStarted.rst ============================================================================== --- vendor/llvm/dist/docs/GettingStarted.rst Tue May 16 19:35:25 2017 (r318367) +++ vendor/llvm/dist/docs/GettingStarted.rst Tue May 16 19:46:52 2017 (r318368) @@ -699,14 +699,14 @@ For developers to work with a git monore .. note:: - This set-up is using unofficial mirror hosted on GitHub, use with caution. + This set-up is using an unofficial mirror hosted on GitHub, use with caution. To set up a clone of all the llvm projects using a unified repository: .. code-block:: console % export TOP_LEVEL_DIR=`pwd` - % git clone https://github.com/llvm-project/llvm-project/ + % git clone https://github.com/llvm-project/llvm-project-20170507/ llvm-project % cd llvm-project % git config branch.master.rebase true Modified: vendor/llvm/dist/docs/LangRef.rst ============================================================================== --- vendor/llvm/dist/docs/LangRef.rst Tue May 16 19:35:25 2017 (r318367) +++ vendor/llvm/dist/docs/LangRef.rst Tue May 16 19:46:52 2017 (r318368) @@ -641,8 +641,9 @@ assume that the globals are densely pack iterate over them as an array, alignment padding would break this iteration. The maximum alignment is ``1 << 29``. -Globals can also have a :ref:`DLL storage class <dllstorageclass>` and -an optional list of attached :ref:`metadata <metadata>`, +Globals can also have a :ref:`DLL storage class <dllstorageclass>`, +an optional :ref:`global attributes <glattrs>` and +an optional list of attached :ref:`metadata <metadata>`. Variables and aliases can have a :ref:`Thread Local Storage Model <tls_model>`. @@ -1624,6 +1625,14 @@ example: the ELF x86-64 abi, but it can be disabled for some compilation units. +.. _glattrs: + +Global Attributes +----------------- + +Attributes may be set to communicate additional information about a global variable. +Unlike :ref:`function attributes <fnattrs>`, attributes on a global variable +are grouped into a single :ref:`attribute group <attrgrp>`. .. _opbundles: @@ -3664,6 +3673,9 @@ Sparc: - ``I``: An immediate 13-bit signed integer. - ``r``: A 32-bit integer register. +- ``f``: Any floating-point register on SparcV8, or a floating point + register in the "low" half of the registers on SparcV9. +- ``e``: Any floating point register. (Same as ``f`` on SparcV8.) SystemZ: @@ -11687,6 +11699,338 @@ Examples: %r2 = call float @llvm.fmuladd.f32(float %a, float %b, float %c) ; yields float:r2 = (a * b) + c + +Experimental Vector Reduction Intrinsics +---------------------------------------- + +Horizontal reductions of vectors can be expressed using the following +intrinsics. Each one takes a vector operand as an input and applies its +respective operation across all elements of the vector, returning a single +scalar result of the same element type. + + +'``llvm.experimental.vector.reduce.add.*``' Intrinsic +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Syntax: +""""""" + +:: + + declare i32 @llvm.experimental.vector.reduce.add.i32.v4i32(<4 x i32> %a) + declare i64 @llvm.experimental.vector.reduce.add.i64.v2i64(<2 x i64> %a) + +Overview: +""""""""" + +The '``llvm.experimental.vector.reduce.add.*``' intrinsics do an integer ``ADD`` +reduction of a vector, returning the result as a scalar. The return type matches +the element-type of the vector input. + +Arguments: +"""""""""" +The argument to this intrinsic must be a vector of integer values. + +'``llvm.experimental.vector.reduce.fadd.*``' Intrinsic +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Syntax: +""""""" + +:: + + declare float @llvm.experimental.vector.reduce.fadd.f32.v4f32(float %acc, <4 x float> %a) + declare double @llvm.experimental.vector.reduce.fadd.f64.v2f64(double %acc, <2 x double> %a) + +Overview: +""""""""" + +The '``llvm.experimental.vector.reduce.fadd.*``' intrinsics do a floating point +``ADD`` reduction of a vector, returning the result as a scalar. The return type +matches the element-type of the vector input. + +If the intrinsic call has fast-math flags, then the reduction will not preserve +the associativity of an equivalent scalarized counterpart. If it does not have +fast-math flags, then the reduction will be *ordered*, implying that the +operation respects the associativity of a scalarized reduction. + + +Arguments: +"""""""""" +The first argument to this intrinsic is a scalar accumulator value, which is +only used when there are no fast-math flags attached. This argument may be undef +when fast-math flags are used. + +The second argument must be a vector of floating point values. + +Examples: +""""""""" + +.. code-block:: llvm + + %fast = call fast float @llvm.experimental.vector.reduce.fadd.f32.v4f32(float undef, <4 x float> %input) ; fast reduction + %ord = call float @llvm.experimental.vector.reduce.fadd.f32.v4f32(float %acc, <4 x float> %input) ; ordered reduction + + +'``llvm.experimental.vector.reduce.mul.*``' Intrinsic +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Syntax: +""""""" + +:: + + declare i32 @llvm.experimental.vector.reduce.mul.i32.v4i32(<4 x i32> %a) + declare i64 @llvm.experimental.vector.reduce.mul.i64.v2i64(<2 x i64> %a) + +Overview: +""""""""" + +The '``llvm.experimental.vector.reduce.mul.*``' intrinsics do an integer ``MUL`` +reduction of a vector, returning the result as a scalar. The return type matches +the element-type of the vector input. + +Arguments: +"""""""""" +The argument to this intrinsic must be a vector of integer values. + +'``llvm.experimental.vector.reduce.fmul.*``' Intrinsic +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Syntax: +""""""" + +:: + + declare float @llvm.experimental.vector.reduce.fmul.f32.v4f32(float %acc, <4 x float> %a) + declare double @llvm.experimental.vector.reduce.fmul.f64.v2f64(double %acc, <2 x double> %a) + +Overview: +""""""""" + +The '``llvm.experimental.vector.reduce.fmul.*``' intrinsics do a floating point +``MUL`` reduction of a vector, returning the result as a scalar. The return type +matches the element-type of the vector input. + +If the intrinsic call has fast-math flags, then the reduction will not preserve +the associativity of an equivalent scalarized counterpart. If it does not have +fast-math flags, then the reduction will be *ordered*, implying that the +operation respects the associativity of a scalarized reduction. + + +Arguments: +"""""""""" +The first argument to this intrinsic is a scalar accumulator value, which is +only used when there are no fast-math flags attached. This argument may be undef +when fast-math flags are used. + +The second argument must be a vector of floating point values. + +Examples: +""""""""" + +.. code-block:: llvm + + %fast = call fast float @llvm.experimental.vector.reduce.fmul.f32.v4f32(float undef, <4 x float> %input) ; fast reduction + %ord = call float @llvm.experimental.vector.reduce.fmul.f32.v4f32(float %acc, <4 x float> %input) ; ordered reduction + +'``llvm.experimental.vector.reduce.and.*``' Intrinsic +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Syntax: +""""""" + +:: + + declare i32 @llvm.experimental.vector.reduce.and.i32.v4i32(<4 x i32> %a) + +Overview: +""""""""" + +The '``llvm.experimental.vector.reduce.and.*``' intrinsics do a bitwise ``AND`` +reduction of a vector, returning the result as a scalar. The return type matches +the element-type of the vector input. + +Arguments: +"""""""""" +The argument to this intrinsic must be a vector of integer values. + +'``llvm.experimental.vector.reduce.or.*``' Intrinsic +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Syntax: +""""""" + +:: + + declare i32 @llvm.experimental.vector.reduce.or.i32.v4i32(<4 x i32> %a) + +Overview: +""""""""" + +The '``llvm.experimental.vector.reduce.or.*``' intrinsics do a bitwise ``OR`` reduction +of a vector, returning the result as a scalar. The return type matches the +element-type of the vector input. + +Arguments: +"""""""""" +The argument to this intrinsic must be a vector of integer values. + +'``llvm.experimental.vector.reduce.xor.*``' Intrinsic +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Syntax: +""""""" + +:: + + declare i32 @llvm.experimental.vector.reduce.xor.i32.v4i32(<4 x i32> %a) + +Overview: +""""""""" + +The '``llvm.experimental.vector.reduce.xor.*``' intrinsics do a bitwise ``XOR`` +reduction of a vector, returning the result as a scalar. The return type matches +the element-type of the vector input. + +Arguments: +"""""""""" +The argument to this intrinsic must be a vector of integer values. + +'``llvm.experimental.vector.reduce.smax.*``' Intrinsic +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Syntax: +""""""" + +:: + + declare i32 @llvm.experimental.vector.reduce.smax.i32.v4i32(<4 x i32> %a) + +Overview: +""""""""" + +The '``llvm.experimental.vector.reduce.smax.*``' intrinsics do a signed integer +``MAX`` reduction of a vector, returning the result as a scalar. The return type +matches the element-type of the vector input. + +Arguments: +"""""""""" +The argument to this intrinsic must be a vector of integer values. + +'``llvm.experimental.vector.reduce.smin.*``' Intrinsic +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Syntax: +""""""" + +:: + + declare i32 @llvm.experimental.vector.reduce.smin.i32.v4i32(<4 x i32> %a) + +Overview: +""""""""" + +The '``llvm.experimental.vector.reduce.smin.*``' intrinsics do a signed integer +``MIN`` reduction of a vector, returning the result as a scalar. The return type +matches the element-type of the vector input. + +Arguments: +"""""""""" +The argument to this intrinsic must be a vector of integer values. + +'``llvm.experimental.vector.reduce.umax.*``' Intrinsic +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Syntax: +""""""" + +:: + + declare i32 @llvm.experimental.vector.reduce.umax.i32.v4i32(<4 x i32> %a) + +Overview: +""""""""" + +The '``llvm.experimental.vector.reduce.umax.*``' intrinsics do an unsigned +integer ``MAX`` reduction of a vector, returning the result as a scalar. The +return type matches the element-type of the vector input. + +Arguments: +"""""""""" +The argument to this intrinsic must be a vector of integer values. + +'``llvm.experimental.vector.reduce.umin.*``' Intrinsic +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Syntax: +""""""" + +:: + + declare i32 @llvm.experimental.vector.reduce.umin.i32.v4i32(<4 x i32> %a) + +Overview: +""""""""" + +The '``llvm.experimental.vector.reduce.umin.*``' intrinsics do an unsigned +integer ``MIN`` reduction of a vector, returning the result as a scalar. The +return type matches the element-type of the vector input. + +Arguments: +"""""""""" +The argument to this intrinsic must be a vector of integer values. + +'``llvm.experimental.vector.reduce.fmax.*``' Intrinsic +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Syntax: +""""""" + +:: + + declare float @llvm.experimental.vector.reduce.fmax.f32.v4f32(<4 x float> %a) + declare double @llvm.experimental.vector.reduce.fmax.f64.v2f64(<2 x double> %a) + +Overview: +""""""""" + +The '``llvm.experimental.vector.reduce.fmax.*``' intrinsics do a floating point +``MAX`` reduction of a vector, returning the result as a scalar. The return type +matches the element-type of the vector input. + +If the intrinsic call has the ``nnan`` fast-math flag then the operation can +assume that NaNs are not present in the input vector. + +Arguments: +"""""""""" +The argument to this intrinsic must be a vector of floating point values. + +'``llvm.experimental.vector.reduce.fmin.*``' Intrinsic +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Syntax: +""""""" + +:: + + declare float @llvm.experimental.vector.reduce.fmin.f32.v4f32(<4 x float> %a) + declare double @llvm.experimental.vector.reduce.fmin.f64.v2f64(<2 x double> %a) + +Overview: +""""""""" + +The '``llvm.experimental.vector.reduce.fmin.*``' intrinsics do a floating point +``MIN`` reduction of a vector, returning the result as a scalar. The return type +matches the element-type of the vector input. + +If the intrinsic call has the ``nnan`` fast-math flag then the operation can +assume that NaNs are not present in the input vector. + +Arguments: +"""""""""" +The argument to this intrinsic must be a vector of floating point values. + Half Precision Floating Point Intrinsics ---------------------------------------- Modified: vendor/llvm/dist/docs/Lexicon.rst ============================================================================== --- vendor/llvm/dist/docs/Lexicon.rst Tue May 16 19:35:25 2017 (r318367) +++ vendor/llvm/dist/docs/Lexicon.rst Tue May 16 19:46:52 2017 (r318368) @@ -249,6 +249,14 @@ S Superword-Level Parallelism, same as :ref:`Basic-Block Vectorization <lexicon-bb-vectorization>`. +**Splat** + Splat refers to a vector of identical scalar elements. + + The term is based on the PowerPC Altivec instructions that provided + this functionality in hardware. For example, "vsplth" and the corresponding + software intrinsic "vec_splat()". Examples of other hardware names for this + action include "duplicate" (ARM) and "broadcast" (x86). + **SRoA** Scalar Replacement of Aggregates Modified: vendor/llvm/dist/docs/LibFuzzer.rst ============================================================================== --- vendor/llvm/dist/docs/LibFuzzer.rst Tue May 16 19:35:25 2017 (r318367) +++ vendor/llvm/dist/docs/LibFuzzer.rst Tue May 16 19:46:52 2017 (r318368) @@ -305,6 +305,10 @@ The most important command line options - 1 : close ``stdout`` - 2 : close ``stderr`` - 3 : close both ``stdout`` and ``stderr``. +``-print_coverage`` + If 1, print coverage information as text at exit. +``-dump_coverage`` + If 1, dump coverage information as a .sancov file at exit. For the full list of flags run the fuzzer binary with ``-help=1``. @@ -543,12 +547,19 @@ You can get the coverage for your corpus .. code-block:: console - ASAN_OPTIONS=coverage=1 ./fuzzer CORPUS_DIR -runs=0 + ./fuzzer CORPUS_DIR -runs=0 -print_coverage=1 This will run all tests in the CORPUS_DIR but will not perform any fuzzing. -At the end of the process it will dump a single ``.sancov`` file with coverage -information. See SanitizerCoverage_ for details on querying the file using the -``sancov`` tool. +At the end of the process it will print text describing what code has been covered and what hasn't. + +Alternatively, use + +.. code-block:: console + + ./fuzzer CORPUS_DIR -runs=0 -dump_coverage=1 + +which will dump a ``.sancov`` file with coverage information. +See SanitizerCoverage_ for details on querying the file using the ``sancov`` tool. You may also use other ways to visualize coverage, e.g. using `Clang coverage <http://clang.llvm.org/docs/SourceBasedCodeCoverage.html>`_, Modified: vendor/llvm/dist/docs/ReleaseNotes.rst ============================================================================== --- vendor/llvm/dist/docs/ReleaseNotes.rst Tue May 16 19:35:25 2017 (r318367) +++ vendor/llvm/dist/docs/ReleaseNotes.rst Tue May 16 19:46:52 2017 (r318368) @@ -40,6 +40,10 @@ Non-comprehensive list of changes in thi functionality, or simply have a lot to talk about), see the `NOTE` below for adding a new subsection. +* LLVM's ``WeakVH`` has been renamed to ``WeakTrackingVH`` and a new ``WeakVH`` + has been introduced. The new ``WeakVH`` nulls itself out on deletion, but + does not track values across RAUW. + * ... next change ... .. NOTE Modified: vendor/llvm/dist/include/llvm/ADT/APInt.h ============================================================================== --- vendor/llvm/dist/include/llvm/ADT/APInt.h Tue May 16 19:35:25 2017 (r318367) +++ vendor/llvm/dist/include/llvm/ADT/APInt.h Tue May 16 19:46:52 2017 (r318368) @@ -157,6 +157,11 @@ private: return isSingleWord() ? U.VAL : U.pVal[whichWord(bitPosition)]; } + /// Utility method to change the bit width of this APInt to new bit width, + /// allocating and/or deallocating as necessary. There is no guarantee on the + /// value of any bits upon return. Caller should populate the bits after. + void reallocate(unsigned NewBitWidth); + /// \brief Convert a char array into an APInt /// /// \param radix 2, 8, 10, 16, or 36 @@ -1437,6 +1442,12 @@ public: /// as "bitPosition". void flipBit(unsigned bitPosition); + /// Negate this APInt in place. + void negate() { + flipAllBits(); + ++(*this); + } + /// Insert the bits from a smaller APInt starting at bitPosition. void insertBits(const APInt &SubBits, unsigned bitPosition); @@ -1646,12 +1657,7 @@ public: /// re-interprets the bits as a double. Note that it is valid to do this on /// any bit width. Exactly 64 bits will be translated. double bitsToDouble() const { - union { - uint64_t I; - double D; - } T; - T.I = (isSingleWord() ? U.VAL : U.pVal[0]); - return T.D; + return BitsToDouble(getWord(0)); } /// \brief Converts APInt bits to a double @@ -1660,12 +1666,7 @@ public: /// re-interprets the bits as a float. Note that it is valid to do this on /// any bit width. Exactly 32 bits will be translated. float bitsToFloat() const { - union { - unsigned I; - float F; - } T; - T.I = unsigned((isSingleWord() ? U.VAL : U.pVal[0])); - return T.F; + return BitsToFloat(getWord(0)); } /// \brief Converts a double to APInt bits. @@ -1673,12 +1674,7 @@ public: /// The conversion does not do a translation from double to integer, it just /// re-interprets the bits of the double. static APInt doubleToBits(double V) { - union { - uint64_t I; - double D; - } T; - T.D = V; - return APInt(sizeof T * CHAR_BIT, T.I); + return APInt(sizeof(double) * CHAR_BIT, DoubleToBits(V)); } /// \brief Converts a float to APInt bits. @@ -1686,12 +1682,7 @@ public: /// The conversion does not do a translation from float to integer, it just /// re-interprets the bits of the float. static APInt floatToBits(float V) { - union { - unsigned I; - float F; - } T; - T.F = V; - return APInt(sizeof T * CHAR_BIT, T.I); + return APInt(sizeof(float) * CHAR_BIT, FloatToBits(V)); } /// @} @@ -1852,10 +1843,9 @@ public: unsigned); /// DST = LHS * RHS, where DST has width the sum of the widths of the - /// operands. No overflow occurs. DST must be disjoint from both - /// operands. Returns the number of parts required to hold the result. - static unsigned tcFullMultiply(WordType *, const WordType *, - const WordType *, unsigned, unsigned); + /// operands. No overflow occurs. DST must be disjoint from both operands. + static void tcFullMultiply(WordType *, const WordType *, + const WordType *, unsigned, unsigned); /// If RHS is zero LHS and REMAINDER are left unchanged, return one. /// Otherwise set LHS to LHS / RHS with the fractional part discarded, set @@ -1997,8 +1987,7 @@ inline raw_ostream &operator<<(raw_ostre } inline APInt operator-(APInt v) { - v.flipAllBits(); - ++v; + v.negate(); return v; } Modified: vendor/llvm/dist/include/llvm/ADT/BitVector.h ============================================================================== --- vendor/llvm/dist/include/llvm/ADT/BitVector.h Tue May 16 19:35:25 2017 (r318367) +++ vendor/llvm/dist/include/llvm/ADT/BitVector.h Tue May 16 19:46:52 2017 (r318368) @@ -255,7 +255,7 @@ public: /// find_prev - Returns the index of the first set bit that precedes the /// the bit at \p PriorTo. Returns -1 if all previous bits are unset. - int find_prev(unsigned PriorTo) { + int find_prev(unsigned PriorTo) const { if (PriorTo == 0) return -1; Modified: vendor/llvm/dist/include/llvm/ADT/STLExtras.h ============================================================================== --- vendor/llvm/dist/include/llvm/ADT/STLExtras.h Tue May 16 19:35:25 2017 (r318367) +++ vendor/llvm/dist/include/llvm/ADT/STLExtras.h Tue May 16 19:46:52 2017 (r318368) @@ -706,6 +706,18 @@ struct is_one_of<T, U, Ts...> { std::is_same<T, U>::value || is_one_of<T, Ts...>::value; }; +/// \brief traits class for checking whether type T is a base class for all +/// the given types in the variadic list. +template <typename T, typename... Ts> struct are_base_of { + static const bool value = true; +}; + +template <typename T, typename U, typename... Ts> +struct are_base_of<T, U, Ts...> { + static const bool value = + std::is_base_of<T, U>::value && are_base_of<T, Ts...>::value; +}; + //===----------------------------------------------------------------------===// // Extra additions for arrays //===----------------------------------------------------------------------===// @@ -1079,7 +1091,7 @@ private: /// /// std::vector<char> Items = {'A', 'B', 'C', 'D'}; /// for (auto X : enumerate(Items)) { -/// printf("Item %d - %c\n", X.Index, X.Value); +/// printf("Item %d - %c\n", X.index(), X.value()); /// } /// /// Output: Modified: vendor/llvm/dist/include/llvm/ADT/StringExtras.h ============================================================================== --- vendor/llvm/dist/include/llvm/ADT/StringExtras.h Tue May 16 19:35:25 2017 (r318367) +++ vendor/llvm/dist/include/llvm/ADT/StringExtras.h Tue May 16 19:46:52 2017 (r318368) @@ -106,6 +106,13 @@ static inline std::string fromHex(String return Output; } +/// \brief Convert the string \p S to an integer of the specified type using +/// the radix \p Base. If \p Base is 0, auto-detects the radix. +/// Returns true if the number was successfully converted, false otherwise. +template <typename N> bool to_integer(StringRef S, N &Num, unsigned Base = 0) { + return !S.getAsInteger(Base, Num); +} + static inline std::string utostr(uint64_t X, bool isNeg = false) { char Buffer[21]; char *BufPtr = std::end(Buffer); Modified: vendor/llvm/dist/include/llvm/Analysis/CallGraph.h ============================================================================== --- vendor/llvm/dist/include/llvm/Analysis/CallGraph.h Tue May 16 19:35:25 2017 (r318367) +++ vendor/llvm/dist/include/llvm/Analysis/CallGraph.h Tue May 16 19:46:52 2017 (r318368) @@ -41,12 +41,6 @@ /// of all of the caller-callee relationships, which is useful for /// transformations. /// -/// The CallGraph class also attempts to figure out what the root of the -/// CallGraph is, which it currently does by looking for a function named -/// 'main'. If no function named 'main' is found, the external node is used as -/// the entry node, reflecting the fact that any function without internal -/// linkage could be called into (which is common for libraries). -/// //===----------------------------------------------------------------------===// #ifndef LLVM_ANALYSIS_CALLGRAPH_H @@ -82,10 +76,6 @@ class CallGraph { /// \brief A map from \c Function* to \c CallGraphNode*. FunctionMapTy FunctionMap; - /// \brief Root is root of the call graph, or the external node if a 'main' - /// function couldn't be found. - CallGraphNode *Root; - /// \brief This node has edges to all external functions and those internal /// functions that have their address taken. CallGraphNode *ExternalCallingNode; Modified: vendor/llvm/dist/include/llvm/Analysis/ProfileSummaryInfo.h ============================================================================== --- vendor/llvm/dist/include/llvm/Analysis/ProfileSummaryInfo.h Tue May 16 19:35:25 2017 (r318367) +++ vendor/llvm/dist/include/llvm/Analysis/ProfileSummaryInfo.h Tue May 16 19:46:52 2017 (r318368) @@ -67,8 +67,8 @@ public: } /// Returns the profile count for \p CallInst. - static Optional<uint64_t> getProfileCount(const Instruction *CallInst, - BlockFrequencyInfo *BFI); + Optional<uint64_t> getProfileCount(const Instruction *CallInst, + BlockFrequencyInfo *BFI); /// \brief Returns true if \p F has hot function entry. bool isFunctionEntryHot(const Function *F); /// Returns true if \p F has hot function entry or hot call edge. Modified: vendor/llvm/dist/include/llvm/Analysis/ScalarEvolution.h ============================================================================== --- vendor/llvm/dist/include/llvm/Analysis/ScalarEvolution.h Tue May 16 19:35:25 2017 (r318367) +++ vendor/llvm/dist/include/llvm/Analysis/ScalarEvolution.h Tue May 16 19:46:52 2017 (r318368) @@ -568,27 +568,16 @@ private: Predicates.insert(P); } - /*implicit*/ ExitLimit(const SCEV *E) - : ExactNotTaken(E), MaxNotTaken(E), MaxOrZero(false) {} + /*implicit*/ ExitLimit(const SCEV *E); ExitLimit( const SCEV *E, const SCEV *M, bool MaxOrZero, - ArrayRef<const SmallPtrSetImpl<const SCEVPredicate *> *> PredSetList) - : ExactNotTaken(E), MaxNotTaken(M), MaxOrZero(MaxOrZero) { - assert((isa<SCEVCouldNotCompute>(ExactNotTaken) || - !isa<SCEVCouldNotCompute>(MaxNotTaken)) && - "Exact is not allowed to be less precise than Max"); - for (auto *PredSet : PredSetList) - for (auto *P : *PredSet) - addPredicate(P); - } + ArrayRef<const SmallPtrSetImpl<const SCEVPredicate *> *> PredSetList); ExitLimit(const SCEV *E, const SCEV *M, bool MaxOrZero, - const SmallPtrSetImpl<const SCEVPredicate *> &PredSet) - : ExitLimit(E, M, MaxOrZero, {&PredSet}) {} + const SmallPtrSetImpl<const SCEVPredicate *> &PredSet); - ExitLimit(const SCEV *E, const SCEV *M, bool MaxOrZero) - : ExitLimit(E, M, MaxOrZero, None) {} + ExitLimit(const SCEV *E, const SCEV *M, bool MaxOrZero); /// Test whether this ExitLimit contains any computed information, or /// whether it's all SCEVCouldNotCompute values. @@ -782,7 +771,7 @@ private: /// Set the memoized range for the given SCEV. const ConstantRange &setRange(const SCEV *S, RangeSignHint Hint, - ConstantRange &&CR) { + ConstantRange CR) { DenseMap<const SCEV *, ConstantRange> &Cache = Hint == HINT_RANGE_UNSIGNED ? UnsignedRanges : SignedRanges; Modified: vendor/llvm/dist/include/llvm/Analysis/TargetLibraryInfo.def ============================================================================== --- vendor/llvm/dist/include/llvm/Analysis/TargetLibraryInfo.def Tue May 16 19:35:25 2017 (r318367) +++ vendor/llvm/dist/include/llvm/Analysis/TargetLibraryInfo.def Tue May 16 19:46:52 2017 (r318368) @@ -161,6 +161,60 @@ TLI_DEFINE_STRING_INTERNAL("_Znwm") /// void *new(unsigned long, nothrow); TLI_DEFINE_ENUM_INTERNAL(ZnwmRKSt9nothrow_t) TLI_DEFINE_STRING_INTERNAL("_ZnwmRKSt9nothrow_t") +/// double __acos_finite(double x); +TLI_DEFINE_ENUM_INTERNAL(acos_finite) +TLI_DEFINE_STRING_INTERNAL("__acos_finite") +/// float __acosf_finite(float x); +TLI_DEFINE_ENUM_INTERNAL(acosf_finite) +TLI_DEFINE_STRING_INTERNAL("__acosf_finite") +/// double __acosh_finite(double x); +TLI_DEFINE_ENUM_INTERNAL(acosh_finite) +TLI_DEFINE_STRING_INTERNAL("__acosh_finite") +/// float __acoshf_finite(float x); +TLI_DEFINE_ENUM_INTERNAL(acoshf_finite) +TLI_DEFINE_STRING_INTERNAL("__acoshf_finite") +/// long double __acoshl_finite(long double x); +TLI_DEFINE_ENUM_INTERNAL(acoshl_finite) +TLI_DEFINE_STRING_INTERNAL("__acoshl_finite") +/// long double __acosl_finite(long double x); +TLI_DEFINE_ENUM_INTERNAL(acosl_finite) +TLI_DEFINE_STRING_INTERNAL("__acosl_finite") +/// double __asin_finite(double x); +TLI_DEFINE_ENUM_INTERNAL(asin_finite) +TLI_DEFINE_STRING_INTERNAL("__asin_finite") +/// float __asinf_finite(float x); +TLI_DEFINE_ENUM_INTERNAL(asinf_finite) +TLI_DEFINE_STRING_INTERNAL("__asinf_finite") +/// long double __asinl_finite(long double x); +TLI_DEFINE_ENUM_INTERNAL(asinl_finite) +TLI_DEFINE_STRING_INTERNAL("__asinl_finite") +/// double atan2_finite(double y, double x); +TLI_DEFINE_ENUM_INTERNAL(atan2_finite) +TLI_DEFINE_STRING_INTERNAL("__atan2_finite") +/// float atan2f_finite(float y, float x); +TLI_DEFINE_ENUM_INTERNAL(atan2f_finite) +TLI_DEFINE_STRING_INTERNAL("__atan2f_finite") +/// long double atan2l_finite(long double y, long double x); +TLI_DEFINE_ENUM_INTERNAL(atan2l_finite) +TLI_DEFINE_STRING_INTERNAL("__atan2l_finite") +/// double __atanh_finite(double x); +TLI_DEFINE_ENUM_INTERNAL(atanh_finite) +TLI_DEFINE_STRING_INTERNAL("__atanh_finite") +/// float __atanhf_finite(float x); +TLI_DEFINE_ENUM_INTERNAL(atanhf_finite) +TLI_DEFINE_STRING_INTERNAL("__atanhf_finite") +/// long double __atanhl_finite(long double x); +TLI_DEFINE_ENUM_INTERNAL(atanhl_finite) +TLI_DEFINE_STRING_INTERNAL("__atanhl_finite") +/// double __cosh_finite(double x); +TLI_DEFINE_ENUM_INTERNAL(cosh_finite) +TLI_DEFINE_STRING_INTERNAL("__cosh_finite") +/// float __coshf_finite(float x); +TLI_DEFINE_ENUM_INTERNAL(coshf_finite) +TLI_DEFINE_STRING_INTERNAL("__coshf_finite") +/// long double __coshl_finite(long double x); +TLI_DEFINE_ENUM_INTERNAL(coshl_finite) +TLI_DEFINE_STRING_INTERNAL("__coshl_finite") /// double __cospi(double x); TLI_DEFINE_ENUM_INTERNAL(cospi) TLI_DEFINE_STRING_INTERNAL("__cospi") @@ -180,12 +234,66 @@ TLI_DEFINE_STRING_INTERNAL("__cxa_guard_ /// void __cxa_guard_release(guard_t *guard); TLI_DEFINE_ENUM_INTERNAL(cxa_guard_release) TLI_DEFINE_STRING_INTERNAL("__cxa_guard_release") +/// double __exp10_finite(double x); +TLI_DEFINE_ENUM_INTERNAL(exp10_finite) +TLI_DEFINE_STRING_INTERNAL("__exp10_finite") +/// float __exp10f_finite(float x); +TLI_DEFINE_ENUM_INTERNAL(exp10f_finite) +TLI_DEFINE_STRING_INTERNAL("__exp10f_finite") +/// long double __exp10l_finite(long double x); +TLI_DEFINE_ENUM_INTERNAL(exp10l_finite) +TLI_DEFINE_STRING_INTERNAL("__exp10l_finite") +/// double __exp2_finite(double x); +TLI_DEFINE_ENUM_INTERNAL(exp2_finite) +TLI_DEFINE_STRING_INTERNAL("__exp2_finite") +/// float __exp2f_finite(float x); +TLI_DEFINE_ENUM_INTERNAL(exp2f_finite) +TLI_DEFINE_STRING_INTERNAL("__exp2f_finite") +/// long double __exp2l_finite(long double x); +TLI_DEFINE_ENUM_INTERNAL(exp2l_finite) +TLI_DEFINE_STRING_INTERNAL("__exp2l_finite") +/// double __exp_finite(double x); +TLI_DEFINE_ENUM_INTERNAL(exp_finite) +TLI_DEFINE_STRING_INTERNAL("__exp_finite") +/// float __expf_finite(float x); +TLI_DEFINE_ENUM_INTERNAL(expf_finite) +TLI_DEFINE_STRING_INTERNAL("__expf_finite") +/// long double __expl_finite(long double x); +TLI_DEFINE_ENUM_INTERNAL(expl_finite) +TLI_DEFINE_STRING_INTERNAL("__expl_finite") /// int __isoc99_scanf (const char *format, ...) TLI_DEFINE_ENUM_INTERNAL(dunder_isoc99_scanf) TLI_DEFINE_STRING_INTERNAL("__isoc99_scanf") /// int __isoc99_sscanf(const char *s, const char *format, ...) TLI_DEFINE_ENUM_INTERNAL(dunder_isoc99_sscanf) TLI_DEFINE_STRING_INTERNAL("__isoc99_sscanf") +/// double __log10_finite(double x); +TLI_DEFINE_ENUM_INTERNAL(log10_finite) +TLI_DEFINE_STRING_INTERNAL("__log10_finite") +/// float __log10f_finite(float x); +TLI_DEFINE_ENUM_INTERNAL(log10f_finite) +TLI_DEFINE_STRING_INTERNAL("__log10f_finite") +/// long double __log10l_finite(long double x); +TLI_DEFINE_ENUM_INTERNAL(log10l_finite) +TLI_DEFINE_STRING_INTERNAL("__log10l_finite") +/// double __log2_finite(double x); +TLI_DEFINE_ENUM_INTERNAL(log2_finite) +TLI_DEFINE_STRING_INTERNAL("__log2_finite") +/// float __log2f_finite(float x); +TLI_DEFINE_ENUM_INTERNAL(log2f_finite) +TLI_DEFINE_STRING_INTERNAL("__log2f_finite") +/// long double __log2l_finite(long double x); +TLI_DEFINE_ENUM_INTERNAL(log2l_finite) +TLI_DEFINE_STRING_INTERNAL("__log2l_finite") +/// double __log_finite(double x); +TLI_DEFINE_ENUM_INTERNAL(log_finite) +TLI_DEFINE_STRING_INTERNAL("__log_finite") +/// float __logf_finite(float x); +TLI_DEFINE_ENUM_INTERNAL(logf_finite) +TLI_DEFINE_STRING_INTERNAL("__logf_finite") +/// long double __logl_finite(long double x); +TLI_DEFINE_ENUM_INTERNAL(logl_finite) +TLI_DEFINE_STRING_INTERNAL("__logl_finite") /// void *__memcpy_chk(void *s1, const void *s2, size_t n, size_t s1size); TLI_DEFINE_ENUM_INTERNAL(memcpy_chk) TLI_DEFINE_STRING_INTERNAL("__memcpy_chk") @@ -199,13 +307,30 @@ TLI_DEFINE_STRING_INTERNAL("__memset_chk // int __nvvm_reflect(const char *) TLI_DEFINE_ENUM_INTERNAL(nvvm_reflect) TLI_DEFINE_STRING_INTERNAL("__nvvm_reflect") - +/// double __pow_finite(double x, double y); +TLI_DEFINE_ENUM_INTERNAL(pow_finite) +TLI_DEFINE_STRING_INTERNAL("__pow_finite") +/// float _powf_finite(float x, float y); +TLI_DEFINE_ENUM_INTERNAL(powf_finite) +TLI_DEFINE_STRING_INTERNAL("__powf_finite") +/// long double __powl_finite(long double x, long double y); +TLI_DEFINE_ENUM_INTERNAL(powl_finite) +TLI_DEFINE_STRING_INTERNAL("__powl_finite") /// double __sincospi_stret(double x); TLI_DEFINE_ENUM_INTERNAL(sincospi_stret) TLI_DEFINE_STRING_INTERNAL("__sincospi_stret") /// float __sincospif_stret(float x); TLI_DEFINE_ENUM_INTERNAL(sincospif_stret) TLI_DEFINE_STRING_INTERNAL("__sincospif_stret") +/// double __sinh_finite(double x); +TLI_DEFINE_ENUM_INTERNAL(sinh_finite) +TLI_DEFINE_STRING_INTERNAL("__sinh_finite") +/// float _sinhf_finite(float x); +TLI_DEFINE_ENUM_INTERNAL(sinhf_finite) +TLI_DEFINE_STRING_INTERNAL("__sinhf_finite") +/// long double __sinhl_finite(long double x); +TLI_DEFINE_ENUM_INTERNAL(sinhl_finite) +TLI_DEFINE_STRING_INTERNAL("__sinhl_finite") /// double __sinpi(double x); TLI_DEFINE_ENUM_INTERNAL(sinpi) TLI_DEFINE_STRING_INTERNAL("__sinpi") Modified: vendor/llvm/dist/include/llvm/Analysis/TargetTransformInfo.h ============================================================================== --- vendor/llvm/dist/include/llvm/Analysis/TargetTransformInfo.h Tue May 16 19:35:25 2017 (r318367) +++ vendor/llvm/dist/include/llvm/Analysis/TargetTransformInfo.h Tue May 16 19:46:52 2017 (r318368) @@ -537,6 +537,9 @@ public: /// \return The width of the largest scalar or vector register type. unsigned getRegisterBitWidth(bool Vector) const; + /// \return The width of the smallest vector register type. + unsigned getMinVectorRegisterBitWidth() const; + /// \return True if it should be considered for address type promotion. /// \p AllowPromotionWithoutCommonHeader Set true if promoting \p I is /// profitable without finding other extensions fed by the same input. @@ -740,6 +743,22 @@ public: unsigned ChainSizeInBytes, VectorType *VecTy) const; + /// Flags describing the kind of vector reduction. + struct ReductionFlags { + ReductionFlags() : IsMaxOp(false), IsSigned(false), NoNaN(false) {} + bool IsMaxOp; ///< If the op a min/max kind, true if it's a max operation. + bool IsSigned; ///< Whether the operation is a signed int reduction. + bool NoNaN; ///< If op is an fp min/max, whether NaNs may be present. + }; + + /// \returns True if the target wants to handle the given reduction idiom in + /// the intrinsics form instead of the shuffle form. + bool useReductionIntrinsic(unsigned Opcode, Type *Ty, + ReductionFlags Flags) const; + + /// \returns True if the target wants to expand the given reduction intrinsic + /// into a shuffle sequence. + bool shouldExpandReduction(const IntrinsicInst *II) const; /// @} private: @@ -824,6 +843,7 @@ public: Type *Ty) = 0; virtual unsigned getNumberOfRegisters(bool Vector) = 0; virtual unsigned getRegisterBitWidth(bool Vector) = 0; + virtual unsigned getMinVectorRegisterBitWidth() = 0; virtual bool shouldConsiderAddressTypePromotion( const Instruction &I, bool &AllowPromotionWithoutCommonHeader) = 0; virtual unsigned getCacheLineSize() = 0; @@ -895,6 +915,9 @@ public: virtual unsigned getStoreVectorFactor(unsigned VF, unsigned StoreSize, unsigned ChainSizeInBytes, VectorType *VecTy) const = 0; + virtual bool useReductionIntrinsic(unsigned Opcode, Type *Ty, + ReductionFlags) const = 0; + virtual bool shouldExpandReduction(const IntrinsicInst *II) const = 0; }; template <typename T> @@ -1057,6 +1080,9 @@ public: unsigned getRegisterBitWidth(bool Vector) override { return Impl.getRegisterBitWidth(Vector); } + unsigned getMinVectorRegisterBitWidth() override { + return Impl.getMinVectorRegisterBitWidth(); + } bool shouldConsiderAddressTypePromotion( const Instruction &I, bool &AllowPromotionWithoutCommonHeader) override { return Impl.shouldConsiderAddressTypePromotion( @@ -1200,6 +1226,13 @@ public: VectorType *VecTy) const override { return Impl.getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy); } *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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