From owner-svn-src-all@freebsd.org Wed Sep 30 02:21:38 2020 Return-Path: Delivered-To: svn-src-all@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id E87AE3F83D2; Wed, 30 Sep 2020 02:21:38 +0000 (UTC) (envelope-from jrtc27@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4C1Kkp5nGhz4YTR; Wed, 30 Sep 2020 02:21:38 +0000 (UTC) (envelope-from jrtc27@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id A9F57186C3; Wed, 30 Sep 2020 02:21:38 +0000 (UTC) (envelope-from jrtc27@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 08U2LcHE098071; Wed, 30 Sep 2020 02:21:38 GMT (envelope-from jrtc27@FreeBSD.org) Received: (from jrtc27@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 08U2Lc5s098070; Wed, 30 Sep 2020 02:21:38 GMT (envelope-from jrtc27@FreeBSD.org) Message-Id: <202009300221.08U2Lc5s098070@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: jrtc27 set sender to jrtc27@FreeBSD.org using -f From: Jessica Clarke Date: Wed, 30 Sep 2020 02:21:38 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r366279 - head/sys/riscv/include X-SVN-Group: head X-SVN-Commit-Author: jrtc27 X-SVN-Commit-Paths: head/sys/riscv/include X-SVN-Commit-Revision: 366279 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.33 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 30 Sep 2020 02:21:39 -0000 Author: jrtc27 Date: Wed Sep 30 02:21:38 2020 New Revision: 366279 URL: https://svnweb.freebsd.org/changeset/base/366279 Log: riscv: Define __PCI_REROUTE_INTERRUPT Every other architecture defines this and this is required for interrupts to work when using QEMU's PCI VirtIO devices (which all report an interrupt line of 0) for two reasons. Firstly, interrupt line 0 is wrong; they use one of 0x20-0x23 with the lines being cycled across devices like normal. Moreover, RISC-V uses INTRNG, whose IRQs are virtual as indices into its irq_map, so even if we have the right interrupt line we still need to try and route the interrupt in order to ultimately call into intr_map_irq and get back a unique index into the map for the given line, otherwise we will use whatever happens to be in irq_map[line] (which for QEMU where the line is initialised to 0 results in using the first allocated interrupt, namely the RTC on IRQ 11 at time of commit). Note that pci_assign_interrupt will still do the wrong thing for INTRNG when using a tunable, as it will bypass INTRNG entirely and use the tunable's value as the index into irq_map, when it should instead (indirectly) call intr_map_irq to allocate a new entry for the given IRQ and treat the tunable as stating the physical line in use, which is what one would expect. This, however, is a problem shared by all INTRNG architectures, and not exclusive to RISC-V. Reviewed by: kib Approved by: kib Differential Revision: https://reviews.freebsd.org/D26564 Modified: head/sys/riscv/include/param.h Modified: head/sys/riscv/include/param.h ============================================================================== --- head/sys/riscv/include/param.h Wed Sep 30 02:18:09 2020 (r366278) +++ head/sys/riscv/include/param.h Wed Sep 30 02:21:38 2020 (r366279) @@ -42,6 +42,8 @@ #define STACKALIGNBYTES (16 - 1) #define STACKALIGN(p) ((uint64_t)(p) & ~STACKALIGNBYTES) +#define __PCI_REROUTE_INTERRUPT + #ifndef MACHINE #define MACHINE "riscv" #endif