Date: Thu, 13 Nov 2008 01:37:07 -0800 From: Jeremy Chadwick <koitsu@FreeBSD.org> To: Won De Erick <won.derick@yahoo.com> Cc: freebsd-hardware@freebsd.org Subject: Re: IRQ31 and IRQ32 on HPDL585 running FreeBSD 7.0 are consuming HIGH CPU usage Message-ID: <20081113093707.GA16322@icarus.home.lan> In-Reply-To: <527634.76455.qm@web45804.mail.sp1.yahoo.com> References: <704830.24415.qm@web45815.mail.sp1.yahoo.com> <20081113072610.GA13698@icarus.home.lan> <576266.41435.qm@web45812.mail.sp1.yahoo.com> <20081113074602.GB13938@icarus.home.lan> <366483.43588.qm@web45807.mail.sp1.yahoo.com> <20081113081936.GA14779@icarus.home.lan> <527634.76455.qm@web45804.mail.sp1.yahoo.com>
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On Thu, Nov 13, 2008 at 01:34:01AM -0800, Won De Erick wrote: > Jeremy Chadwick wrote: > > >> On Thu, Nov 13, 2008 at 12:07:37AM -0800, Won De Erick wrote: > >> Noted on this, I will update you through this thread. > >> > >> However is there any possibility of the following: > >> > >> > I don't know if there's a way to split the interrupt request for each bce's Rx and Tx, > >> > which means a total of four IRQs, and eventually four cores (or 4 CPUs) > >> > for the transactions. With this way, the IDLE processors would be utilized. > >> > >> What I mean here is, for the two interfaces: > >> > >> one IRQ for bce0 Rx > >> one IRQ for bce0 Tx > >> one IRQ for bce1 Rx > >> one IRQ for bce1 Tx > > > I can't even begin to imagine how this would be possible on any NIC. > > Yeah, but I can't also imagine how beneficial this idea when implemented. Right -- me either. What you just said begs the question. :-) -- | Jeremy Chadwick jdc at parodius.com | | Parodius Networking http://www.parodius.com/ | | UNIX Systems Administrator Mountain View, CA, USA | | Making life hard for others since 1977. PGP: 4BD6C0CB |
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