From owner-freebsd-questions Thu Mar 7 10:30:10 1996 Return-Path: owner-questions Received: (from root@localhost) by freefall.freebsd.org (8.7.3/8.7.3) id KAA27930 for questions-outgoing; Thu, 7 Mar 1996 10:30:10 -0800 (PST) Received: from labinfo.iet.unipi.it (labinfo.iet.unipi.it [131.114.9.5]) by freefall.freebsd.org (8.7.3/8.7.3) with SMTP id KAA27840 for ; Thu, 7 Mar 1996 10:29:48 -0800 (PST) Received: from localhost (luigi@localhost) by labinfo.iet.unipi.it (8.6.5/8.6.5) id TAA11355; Thu, 7 Mar 1996 19:23:33 +0100 From: Luigi Rizzo Message-Id: <199603071823.TAA11355@labinfo.iet.unipi.it> Subject: Re: Bad Ethernet cards To: terry@lambert.org (Terry Lambert) Date: Thu, 7 Mar 1996 19:23:33 +0100 (MET) Cc: wollman@lcs.mit.edu, questions@FreeBSD.ORG In-Reply-To: <199603071746.KAA14281@phaeton.artisoft.com> from "Terry Lambert" at Mar 7, 96 10:45:43 am X-Mailer: ELM [version 2.4 PL23] Content-Type: text Sender: owner-questions@FreeBSD.ORG Precedence: bulk > > > It doesn't matter what sort of bus it's on; if the CPU has to do all > > > the work, when it could (should) be doing higher-level processing, then > > > performance is going to suck. There is no way around it. > > > > The bus' speed changes things a lot. > > > > An ethernet has a bandwidth of 1MB/s. I agree that on the ISA bus > > you are likely to move data at 2MB/s or so, thus the CPU overhead > > is 50% just for getting data from the board. But moving data on > > VLB or PCI bus with programmed I/O is much faster (possibly limited > > by the on-board memory speed, but many boards use 25ns or so SRAMS). > > On the VLB I have measured at least 10MB/s, on the PCI I expect > > the number to be higher, possibly around 20MB/s. Thus the CPU > > overhead is at most 5% per card, assuming you consume the whole > > bandwidth of the net segment. > > > > This is something that I can afford, except perhaps for a multiport > > high speed router. > > You forget that it takes 4 CPU clocks for one PCI clock for a 133MHz > P5. > > Multiply your PIO overhead by 4 (or more, if you trigger any wait > states). I did my computation as follows: assume the CPU has to transfer 1MB/s from the board. Say the available bandwidth on the PCI bus, doing programmed I/O, is X MB/s. Then the CPU uses 1/X of its time just to transfer that 1MB/s. For X=20, that makes 5% of the CPU time unavailable for other things. Anything wrong ? Now, the board in question has a single (it's a cheap unit!) 35ns SRAM on it, which means that it can probably supply one byte every 66ns (the closest multiple of the PCI period). That makes a BW of 15 MB/s, not too far from my estimate. Luigi ==================================================================== Luigi Rizzo Dip. di Ingegneria dell'Informazione email: luigi@iet.unipi.it Universita' di Pisa tel: +39-50-568533 via Diotisalvi 2, 56126 PISA (Italy) fax: +39-50-568522 http://www.iet.unipi.it/~luigi/ ====================================================================