From owner-svn-src-head@freebsd.org Thu Apr 13 14:23:28 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 74A8AD3CA34; Thu, 13 Apr 2017 14:23:28 +0000 (UTC) (envelope-from kan@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 4423E29F; Thu, 13 Apr 2017 14:23:28 +0000 (UTC) (envelope-from kan@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v3DENRGg069717; Thu, 13 Apr 2017 14:23:27 GMT (envelope-from kan@FreeBSD.org) Received: (from kan@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v3DENRiK069715; Thu, 13 Apr 2017 14:23:27 GMT (envelope-from kan@FreeBSD.org) Message-Id: <201704131423.v3DENRiK069715@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: kan set sender to kan@FreeBSD.org using -f From: Alexander Kabaev Date: Thu, 13 Apr 2017 14:23:27 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r316757 - in head/sys: arm/arm arm64/arm64 X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 13 Apr 2017 14:23:28 -0000 Author: kan Date: Thu Apr 13 14:23:27 2017 New Revision: 316757 URL: https://svnweb.freebsd.org/changeset/base/316757 Log: Use proper fields to check for interrupt trigger mode. Modified: head/sys/arm/arm/gic.c head/sys/arm64/arm64/gic_v3.c Modified: head/sys/arm/arm/gic.c ============================================================================== --- head/sys/arm/arm/gic.c Thu Apr 13 13:46:01 2017 (r316756) +++ head/sys/arm/arm/gic.c Thu Apr 13 14:23:27 2017 (r316757) @@ -987,7 +987,7 @@ arm_gic_setup_intr(device_t dev, struct gi->gi_trig = trig; /* Edge triggered interrupts need an early EOI sent */ - if (gi->gi_pol == INTR_TRIGGER_EDGE) + if (gi->gi_trig == INTR_TRIGGER_EDGE) gi->gi_flags |= GI_FLAG_EARLY_EOI; } Modified: head/sys/arm64/arm64/gic_v3.c ============================================================================== --- head/sys/arm64/arm64/gic_v3.c Thu Apr 13 13:46:01 2017 (r316756) +++ head/sys/arm64/arm64/gic_v3.c Thu Apr 13 14:23:27 2017 (r316757) @@ -437,11 +437,11 @@ arm_gic_v3_intr(void *arg) #endif } else if (active_irq >= GIC_FIRST_PPI && active_irq <= GIC_LAST_SPI) { - if (gi->gi_pol == INTR_TRIGGER_EDGE) + if (gi->gi_trig == INTR_TRIGGER_EDGE) gic_icc_write(EOIR1, gi->gi_irq); if (intr_isrc_dispatch(&gi->gi_isrc, tf) != 0) { - if (gi->gi_pol != INTR_TRIGGER_EDGE) + if (gi->gi_trig != INTR_TRIGGER_EDGE) gic_icc_write(EOIR1, gi->gi_irq); gic_v3_disable_intr(sc->dev, &gi->gi_isrc); device_printf(sc->dev, @@ -781,7 +781,7 @@ gic_v3_post_filter(device_t dev, struct { struct gic_v3_irqsrc *gi = (struct gic_v3_irqsrc *)isrc; - if (gi->gi_pol == INTR_TRIGGER_EDGE) + if (gi->gi_trig == INTR_TRIGGER_EDGE) return; gic_icc_write(EOIR1, gi->gi_irq);