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Date: Wed, 8 Jul 2015 14:58:23 +0100
From: Andrew Turner <andrew@fubar.geek.nz>
To: Zbigniew Bodek <zbb@FreeBSD.org>
Cc: src-committers@freebsd.org, svn-src-all@freebsd.org,
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Subject: Re: svn commit: r285270 - head/sys/sys
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On Wed, 8 Jul 2015 13:53:00 +0000 (UTC)
Zbigniew Bodek <zbb@FreeBSD.org> wrote:

> Author: zbb
> Date: Wed Jul  8 13:52:59 2015
> New Revision: 285270
> URL: https://svnweb.freebsd.org/changeset/base/285270
> 
> Log:
>   Add memory barrier to bus_dmamap_sync()
>   
>   On platforms which are fully IO-coherent, the map might be null.
>   We need to guarantee that all data is observable after the
>   sync operation is called. Add a memory barrier to ensure that on
> ARM. 
>   Reviewed by:   andrew, kib
>   Obtained from: Semihalf
>   Sponsored by:  The FreeBSD Foundation
>   Differential Revision: https://reviews.freebsd.org/D3012
> 
> Modified:
>   head/sys/sys/bus_dma.h
> 
> Modified: head/sys/sys/bus_dma.h
> ==============================================================================
> --- head/sys/sys/bus_dma.h	Wed Jul  8 13:19:13 2015
> (r285269) +++ head/sys/sys/bus_dma.h	Wed Jul  8 13:52:59
> 2015	(r285270) @@ -282,13 +282,25 @@ int
> bus_dmamem_alloc(bus_dma_tag_t dmat, void
> bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map); 
>  /*
> - * Perform a synchronization operation on the given map.
> + * Perform a synchronization operation on the given map. If the map
> + * is NULL we have a fully IO-coherent system. On every ARM
> architecture
> + * there must be a memory barrier placed to ensure that all data
> + * accesses are visible before going any further.
>   */
>  void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_dmasync_op_t);
> +#if defined(__arm__)
> +	#define __BUS_DMAMAP_SYNC_DEFAULT		mb();

Should this be a dmb or dsb? mb() is implemented as the former on
ARMv7, and as the equivalent using mcr on ARMv6. Only on ARMv4 and
ARMv5 is it a dsb.

Andrew