Date: Tue, 13 Jul 2004 10:59:00 -0400 (EDT) From: Andre Guibert de Bruet <andy@siliconlandmark.com> To: Johan Pettersson <manlix@demonized.net> Cc: freebsd-current@freebsd.org Subject: Re: CPUTYPE=p4 & kernel config Message-ID: <20040713104934.U24726@alpha.siliconlandmark.com> In-Reply-To: <20040713103802.654daae4.manlix@demonized.net> References: <200407121248.42792.ilker.ozupak@emu.edu.tr> <20040713103802.654daae4.manlix@demonized.net>
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On Tue, 13 Jul 2004, Johan Pettersson wrote:
> On Mon, 12 Jul 2004 22:17:56 -0400 (EDT)
> Andre Guibert de Bruet <andy@siliconlandmark.com> wrote:
>
>> On Mon, 12 Jul 2004, Ilker OZUPAK wrote:
>>
>>> is there any kernel options that is mandatory for the
>>> "CPUTYPE=p4" case. anything to be addded to GENERIC
>>> or to not to be removed.
>>
>> Your CPU qualifies for the I686_CPU cpu directive. You may consider
>> commenting out I{4,5}86_CPU if you are not concerned with having the
>> kernel boot on older machines. You may also want to add "options
>> CPU_ENABLE_SSE".
>
> 'CPU_ENABLE_SSE' is automatically enabled when the kernel is compiled
> with 'cpu I686_CPU'.
Pentium Pros, IIs, Xeon IIs and early Celerons are 686s but they do not
support SSE (SIMD was introduced with the PIII, IIRC). Are you positive
that SSE floating-point calculations are enabled with I686_CPU?
Here's what the cpu features bitfield expands to on an older 686:
Features=0x183fbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,MMX,FXSR>
Compare this to the following, which was taken from a newer 686:
Features=0x383fbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,MMX,FXSR,SSE>
Regards,
> Andre Guibert de Bruet | Enterprise Software Consultant >
> Silicon Landmark, LLC. | http://siliconlandmark.com/ >
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