From nobody Thu Nov 4 16:02:57 2021 X-Original-To: dev-commits-src-main@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id AD7A0183DC50; Thu, 4 Nov 2021 16:03:00 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4HlT1w1bGMz3HRy; Thu, 4 Nov 2021 16:03:00 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id BEAB42EF9C; Thu, 4 Nov 2021 16:02:57 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.16.1/8.16.1) with ESMTP id 1A4G2vXJ003816; Thu, 4 Nov 2021 16:02:57 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.16.1/8.16.1/Submit) id 1A4G2vMG003815; Thu, 4 Nov 2021 16:02:57 GMT (envelope-from git) Date: Thu, 4 Nov 2021 16:02:57 GMT Message-Id: <202111041602.1A4G2vMG003815@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Adrian Chadd Subject: git: cfd06987029a - main - ipq4018: add qcom-gcc-ipq4018 and dependencies into the build List-Id: Commit messages for the main branch of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-main List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-main@freebsd.org X-BeenThere: dev-commits-src-main@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: adrian X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: cfd06987029ac1bf5f6a6be2d87ade7358bd59ca Auto-Submitted: auto-generated X-ThisMailContainsUnwantedMimeParts: N The branch main has been updated by adrian: URL: https://cgit.FreeBSD.org/src/commit/?id=cfd06987029ac1bf5f6a6be2d87ade7358bd59ca commit cfd06987029ac1bf5f6a6be2d87ade7358bd59ca Author: Adrian Chadd AuthorDate: 2021-10-31 03:45:17 +0000 Commit: Adrian Chadd CommitDate: 2021-11-04 16:02:43 +0000 ipq4018: add qcom-gcc-ipq4018 and dependencies into the build * add the extres stuff into the build, I'm going to end up leveraging all of it * include the qcom-gcc-ipq4018 driver which currently implements the hwreset side of the API. Reviewed by: andrew, manu, imp Differential Revision: https://reviews.freebsd.org/D32723 --- sys/arm/conf/std.qca | 12 +++++ sys/arm/qualcomm/qcom_gcc_ipq4018_clock.c | 82 +++++++++++++++++++++++++++++++ sys/arm/qualcomm/std.ipq4018 | 1 + 3 files changed, 95 insertions(+) diff --git a/sys/arm/conf/std.qca b/sys/arm/conf/std.qca index 00d627b77b7b..09cd61078870 100644 --- a/sys/arm/conf/std.qca +++ b/sys/arm/conf/std.qca @@ -12,6 +12,15 @@ files "../qualcomm/std.ipq4018" device uart device uart_msm # Qualcomm MSM UART driver +# EXT_RESOURCES pseudo devices +options EXT_RESOURCES +device clk +device phy +device hwreset +device nvmem +device regulator +device syscon + # Random device qcom_rnd @@ -28,6 +37,9 @@ device mpcore_timer # PSCI - SMC calls, needed for qualcomm SCM device psci +# Clock/Reset provider +device qcom_gcc_ipq4018 + options FDT # Disable CP14 work in DDB as TZ won't let us by default diff --git a/sys/arm/qualcomm/qcom_gcc_ipq4018_clock.c b/sys/arm/qualcomm/qcom_gcc_ipq4018_clock.c new file mode 100644 index 000000000000..f7f7a6c348ba --- /dev/null +++ b/sys/arm/qualcomm/qcom_gcc_ipq4018_clock.c @@ -0,0 +1,82 @@ +/*- + * SPDX-License-Identifier: BSD-2-Clause-FreeBSD + * + * Copyright (c) 2021, Adrian Chadd + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice unmodified, this list of conditions, and the following + * disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/* Driver for Qualcomm IPQ4018 clock and reset device */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include + +#include + +#include + + +/* + * Fixed frequency clock sources: + * + * P_XO - 48MHz + * sleep-clk - is really 32KHz, although older DTS have it as 32.768KHz + */ + +/* + * PLL derived sources: + * + * P_FEPLL125 - 125MHz + * P_FEPLL125DLY - 125MHz + * P_FEPLL200 - 200MHz + * P_FEPLL500 - 500MHz + * P_FEPLLWCSS2G - TBD + * P_FEPLLWCSS5G - TBD + * + * Then there are two DDR PLLs which are treated/configured slightly + * differently: + * + * P_DDRPLLAPSS - TBD + * P_DDRPLLSDCC - TBD + */ + +/* + * Interesting stuff in Linux whilst I reverse engineer + figure it out: + * /sys/kernel/debug/clk + */ diff --git a/sys/arm/qualcomm/std.ipq4018 b/sys/arm/qualcomm/std.ipq4018 index 7e8ac39e7222..913314e92301 100644 --- a/sys/arm/qualcomm/std.ipq4018 +++ b/sys/arm/qualcomm/std.ipq4018 @@ -6,4 +6,5 @@ arm/qualcomm/qcom_cpu_kpssv2.c optional smp dev/qcom_rnd/qcom_rnd.c optional qcom_rnd arm/qualcomm/qcom_gcc_ipq4018.c optional qcom_gcc_ipq4018 arm/qualcomm/qcom_gcc_ipq4018_reset.c optional qcom_gcc_ipq4018 +arm/qualcomm/qcom_gcc_ipq4018_clock.c optional qcom_gcc_ipq4018