From owner-freebsd-current@FreeBSD.ORG Thu Nov 24 05:32:00 2005 Return-Path: X-Original-To: current@freebsd.org Delivered-To: freebsd-current@FreeBSD.ORG Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 3AEDA16A41F; Thu, 24 Nov 2005 05:32:00 +0000 (GMT) (envelope-from dillon@apollo.backplane.com) Received: from apollo.backplane.com (apollo.backplane.com [216.240.41.2]) by mx1.FreeBSD.org (Postfix) with ESMTP id 83C7543D4C; Thu, 24 Nov 2005 05:31:58 +0000 (GMT) (envelope-from dillon@apollo.backplane.com) Received: from apollo.backplane.com (localhost [127.0.0.1]) by apollo.backplane.com (8.13.4/8.13.4) with ESMTP id jAO5VOr7051047; Wed, 23 Nov 2005 21:31:24 -0800 (PST) Received: (from dillon@localhost) by apollo.backplane.com (8.13.4/8.13.4/Submit) id jAO5VOEm051046; Wed, 23 Nov 2005 21:31:24 -0800 (PST) Date: Wed, 23 Nov 2005 21:31:24 -0800 (PST) From: Matthew Dillon Message-Id: <200511240531.jAO5VOEm051046@apollo.backplane.com> To: Scott Long References: <20051123030304.GA84202@xor.obsecurity.org> <20051123084653.GA90927@xor.obsecurity.org> <43851A08.5080802@roq.com> <43851B69.5090701@samsco.org> <43853FF3.2050103@roq.com> <438546F8.5010601@samsco.org> Cc: Michael Vince , net@freebsd.org, current@freebsd.org, Kris Kennaway Subject: Re: em interrupt storm X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 24 Nov 2005 05:32:00 -0000 :You're seeing the same aliasing. Here's exactly what happens: :irq64 generates an interrupt and the APIC routes it to the CPU. :FreeBSD services the interrupt, masks irq64 in the APIC, and schedules :the interrupt thread for em2. When that ithread runs, the driver :will take action to turn off the interrupt at the card, and then :irq64 will be unmasked when the ithread completes. PCI interrupts are :level driven, so they stay active until the driver tells the hardware to :turn them off. However, as soon as the interrupt get masked, the APIC :re-routes the signal to irq16. Since irq16 is an interrupt that freebsd :cares about, it's enabled, so FreeBSD gets interrupted again. It then :masks irq16 and schedules the em0/uhci0 ithread. I'm a little confused as to what 'irq16' really means in this context. Are we talking about pin 16 on the IOAPIC (i.e. the 'irq16' cannot be distinguished from an interrupt on pin 16), or is it generating an actual BASE+16 vector to the LAPIC whenever some other pin is masked, or is it generating a fixed vector? It should be possible to work around the problem by using the trick that Linux uses, which is to 'mask' the IOAPIC interrupt by programming the pin from level to edge triggered (and then back to level triggered when the interrupt thread is finished with it), instead of masking the pin. This trick can result in a double interrupt, but it will stop the continuous interrupts. -Matt Matthew Dillon