From owner-freebsd-hardware@FreeBSD.ORG Mon Jun 19 16:30:54 2006 Return-Path: X-Original-To: freebsd-hardware@freebsd.org Delivered-To: freebsd-hardware@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 18C7916A479 for ; Mon, 19 Jun 2006 16:30:54 +0000 (UTC) (envelope-from rand@meridian-enviro.com) Received: from newman.meridian-enviro.com (newman.meridian-enviro.com [207.109.235.166]) by mx1.FreeBSD.org (Postfix) with ESMTP id E40A943D6D for ; Mon, 19 Jun 2006 16:30:45 +0000 (GMT) (envelope-from rand@meridian-enviro.com) X-Envelope-To: freebsd-hardware@freebsd.org Received: from delta.meridian-enviro.com (delta.meridian-enviro.com [10.10.10.43]) by newman.meridian-enviro.com (8.13.1/8.13.1) with ESMTP id k5JGUhxw010772; Mon, 19 Jun 2006 11:30:43 -0500 (CDT) (envelope-from rand@meridian-enviro.com) Date: Mon, 19 Jun 2006 11:30:43 -0500 Message-ID: <87y7vt3y6k.wl%rand@meridian-enviro.com> From: "Douglas K. Rand" To: "Rusty Biesele" In-Reply-To: <55E8A262A88DE647A8CBFE4155F513BD534D4D@twinstar.research.takarus.com> References: <55E8A262A88DE647A8CBFE4155F513BD534D4D@twinstar.research.takarus.com> User-Agent: Wanderlust/2.14.0 (Africa) SEMI/1.14.6 (Maruoka) FLIM/1.14.8 (=?ISO-8859-4?Q?Shij=F2?=) APEL/10.6 Emacs/21.3 (i386--freebsd) MULE/5.0 (SAKAKI) MIME-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Content-Type: text/plain; charset=US-ASCII X-Virus-Scanned: ClamAV 0.88/1549/Sat Jun 17 17:20:39 2006 on newman.meridian-enviro.com X-Virus-Status: Clean Cc: Marcel Moolenaar , freebsd-hardware@freebsd.org Subject: Re: puc & SIIG & Baud Rates X-BeenThere: freebsd-hardware@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: General discussion of FreeBSD hardware List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 19 Jun 2006 16:30:54 -0000 Rusty> The question he posed was how to patch pucdata.c for its 10X Rusty> clock frequency without interfering with other Oxford Rusty> Semiconductor chip based cards. I had worked with Marcel Moolenaar off-list and had gotten from SIIG a list of all their cards that use the 10x crystals. Here's the patch I sent Marcel that I think "fixes" all the supported SIIG cards with the fast crystal. Marcel said he's going to commit this when he makes some other changes to puc. Attached is the patch I sent Marcel along with the list of SIIG cards that use the 18.432 MHz crystals. ===File ~/patch============================================= --- pucdata.c-orig Thu May 25 15:11:08 2006 +++ pucdata.c Wed May 31 18:13:31 2006 @@ -434,6 +434,10 @@ /* * SIIG "20x" family boards. + * Some of these boards use a 18.432 MHz clock which is + * 10x faster than the nominal 1.8432 MHz clock used + * for most UARTs. These SIIG definitions must come + * before the Oxford definitions. */ /* SIIG Cyber Parallel PCI (20x family): 1P */ @@ -490,157 +494,157 @@ /* SIIG Cyber Serial PCI 16C550 (20x family): 1S */ { "SIIG Cyber Serial PCI 16C550 (20x family)", - { 0x131f, 0x2000, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x1415, 0x950a, 0x131f, 0x2000 }, + { 0xffff, 0xffff, 0xffff, 0xffff }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ * 10 }, }, }, /* SIIG Cyber Serial PCI 16C650 (20x family): 1S */ { "SIIG Cyber Serial PCI 16C650 (20x family)", - { 0x131f, 0x2001, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x1415, 0x950a, 0x131f, 0x2001 }, + { 0xffff, 0xffff, 0xffff, 0xffff }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ * 10 }, }, }, /* SIIG Cyber Serial PCI 16C850 (20x family): 1S */ { "SIIG Cyber Serial PCI 16C850 (20x family)", - { 0x131f, 0x2002, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x1415, 0x950a, 0x131f, 0x2002 }, + { 0xffff, 0xffff, 0xffff, 0xffff }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ * 10 }, }, }, /* SIIG Cyber I/O PCI 16C550 (20x family): 1S, 1P */ { "SIIG Cyber I/O PCI 16C550 (20x family)", - { 0x131f, 0x2010, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x1415, 0x950a, 0x131f, 0x2010 }, + { 0xffff, 0xffff, 0xffff, 0xffff }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ * 10 }, { PUC_PORT_TYPE_LPT, 0x14, 0x00, 0x00 }, }, }, /* SIIG Cyber I/O PCI 16C650 (20x family): 1S, 1P */ { "SIIG Cyber I/O PCI 16C650 (20x family)", - { 0x131f, 0x2011, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x1415, 0x950a, 0x131f, 0x2011 }, + { 0xffff, 0xffff, 0xffff, 0xffff }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ * 10 }, { PUC_PORT_TYPE_LPT, 0x14, 0x00, 0x00 }, }, }, /* SIIG Cyber I/O PCI 16C850 (20x family): 1S, 1P */ { "SIIG Cyber I/O PCI 16C850 (20x family)", - { 0x131f, 0x2012, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x1415, 0x950a, 0x131f, 0x2012 }, + { 0xffff, 0xffff, 0xffff, 0xffff }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ * 10 }, { PUC_PORT_TYPE_LPT, 0x14, 0x00, 0x00 }, }, }, /* SIIG Cyber Serial Dual PCI 16C550 (20x family): 2S */ { "SIIG Cyber Serial Dual PCI 16C550 (20x family)", - { 0x131f, 0x2030, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x1415, 0x950a, 0x131f, 0x2030 }, + { 0xffff, 0xffff, 0xffff, 0xffff }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ * 10 }, + { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ * 10 }, }, }, /* SIIG Cyber Serial Dual PCI 16C650 (20x family): 2S */ { "SIIG Cyber Serial Dual PCI 16C650 (20x family)", - { 0x131f, 0x2031, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x1415, 0x950a, 0x131f, 0x2031 }, + { 0xffff, 0xffff, 0xffff, 0xffff }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ * 10 }, + { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ * 10 }, }, }, /* SIIG Cyber Serial Dual PCI 16C850 (20x family): 2S */ { "SIIG Cyber Serial Dual PCI 16C850 (20x family)", - { 0x131f, 0x2032, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x1415, 0x950a, 0x131f, 0x2032 }, + { 0xffff, 0xffff, 0xffff, 0xffff }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ * 10 }, + { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ * 10 }, }, }, /* SIIG Cyber 2S1P PCI 16C550 (20x family): 2S, 1P */ { "SIIG Cyber 2S1P PCI 16C550 (20x family)", - { 0x131f, 0x2060, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x1415, 0x950a, 0x131f, 0x2060 }, + { 0xffff, 0xffff, 0xffff, 0xffff }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ * 10 }, + { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ * 10 }, { PUC_PORT_TYPE_LPT, 0x18, 0x00, 0x00 }, }, }, /* SIIG Cyber 2S1P PCI 16C650 (20x family): 2S, 1P */ { "SIIG Cyber 2S1P PCI 16C650 (20x family)", - { 0x131f, 0x2061, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x1415, 0x950a, 0x131f, 0x2061 }, + { 0xffff, 0xffff, 0xffff, 0xffff }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ * 10 }, + { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ * 10 }, { PUC_PORT_TYPE_LPT, 0x18, 0x00, 0x00 }, }, }, /* SIIG Cyber 2S1P PCI 16C850 (20x family): 2S, 1P */ { "SIIG Cyber 2S1P PCI 16C850 (20x family)", - { 0x131f, 0x2062, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x1415, 0x950a, 0x131f, 0x2062 }, + { 0xffff, 0xffff, 0xffff, 0xffff }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ * 10 }, + { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ * 10 }, { PUC_PORT_TYPE_LPT, 0x18, 0x00, 0x00 }, }, }, /* SIIG Cyber 4S PCI 16C550 (20x family): 4S */ { "SIIG Cyber 4S PCI 16C550 (20x family)", - { 0x131f, 0x2050, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x1415, 0x950a, 0x131f, 0x2050 }, + { 0xffff, 0xffff, 0xffff, 0xffff }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ * 10 }, + { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ * 10 }, + { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ * 10 }, + { PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ * 10 }, }, }, /* SIIG Cyber 4S PCI 16C650 (20x family): 4S */ { "SIIG Cyber 4S PCI 16C650 (20x family)", - { 0x131f, 0x2051, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x1415, 0x9501, 0x131f, 0x2051 }, + { 0xffff, 0xffff, 0xffff, 0xffff }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ * 10 }, + { PUC_PORT_TYPE_COM, 0x10, 0x08, COM_FREQ * 10 }, + { PUC_PORT_TYPE_COM, 0x10, 0x10, COM_FREQ * 10 }, + { PUC_PORT_TYPE_COM, 0x10, 0x18, COM_FREQ * 10 }, }, }, /* SIIG Cyber 4S PCI 16C850 (20x family): 4S */ { "SIIG Cyber 4S PCI 16C850 (20x family)", - { 0x131f, 0x2052, 0, 0 }, - { 0xffff, 0xffff, 0, 0 }, + { 0x1415, 0x950a, 0x131f, 0x2052 }, + { 0xffff, 0xffff, 0xffff, 0xffff }, { - { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ }, - { PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ }, + { PUC_PORT_TYPE_COM, 0x10, 0x00, COM_FREQ * 10 }, + { PUC_PORT_TYPE_COM, 0x14, 0x00, COM_FREQ * 10 }, + { PUC_PORT_TYPE_COM, 0x18, 0x00, COM_FREQ * 10 }, + { PUC_PORT_TYPE_COM, 0x1c, 0x00, COM_FREQ * 10 }, }, }, ============================================================ SIIG cards using the 10x crystal: 1S-550 1S-650 1S-950 2S-550 2S-650 2S-950 4S-550 4S-650 4S-950 8S-550 8S-650 8S-950 1S1P-550 1S1P-650 1S1P-950 2S1P-550 2S1P-650 2S1P-950