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Date:      Fri, 14 Aug 1998 21:44:41 +0200
From:      Olivier Galibert <galibert@pobox.com>
To:        Warner Losh <imp@village.org>
Cc:        hackers@FreeBSD.ORG
Subject:   Re: 64-bit time_t
Message-ID:  <19980814214441.A9271@loria.fr>
In-Reply-To: <199808141943.NAA16592@harmony.village.org>; from Warner Losh on Fri, Aug 14, 1998 at 01:43:04PM -0600
References:  <19980814201233.A8962@loria.fr> <199808141115.FAA21672@lariat.lariat.org> <Pine.SGI.3.95.980814091311.18292A-100000@orion.aye.net> <199808141526.JAA23467@lariat.lariat.org> <19980814201233.A8962@loria.fr> <199808141943.NAA16592@harmony.village.org>

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On Fri, Aug 14, 1998 at 01:43:04PM -0600, Warner Losh wrote:
> The R4000 and R5000 (both of which implement MIPS III) are 64 bit as
> well.  They have 64 bit instructions[*] and registers.

Actually, not  all R4K.  But  anyway, "definitively  not  x86" was the
point ;-)


> While it is
> true that there is a cost associated with snagging bits from memory or
> squirting it back to memory, the cache tends to mitigate these effects
> somewhat.

What's really costly in terms of instructions and register pressure is
64-bits arithmetic on 32-bits architectures.

  OG.


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