From owner-svn-src-all@FreeBSD.ORG Wed Sep 23 02:45:03 2009 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id DBE271065672; Wed, 23 Sep 2009 02:45:02 +0000 (UTC) (envelope-from delphij@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id CA86E8FC08; Wed, 23 Sep 2009 02:45:02 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id n8N2j2Zp042721; Wed, 23 Sep 2009 02:45:02 GMT (envelope-from delphij@svn.freebsd.org) Received: (from delphij@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id n8N2j2wp042719; Wed, 23 Sep 2009 02:45:02 GMT (envelope-from delphij@svn.freebsd.org) Message-Id: <200909230245.n8N2j2wp042719@svn.freebsd.org> From: Xin LI Date: Wed, 23 Sep 2009 02:45:02 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r197424 - head/sys/dev/fb X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 23 Sep 2009 02:45:03 -0000 Author: delphij Date: Wed Sep 23 02:45:02 2009 New Revision: 197424 URL: http://svn.freebsd.org/changeset/base/197424 Log: Initialize registers to zero before calling the interrupt handlers inside emulator. This fixes VESA related freeze observed on some systems. Submitted by: paradox Modified: head/sys/dev/fb/vesa.c Modified: head/sys/dev/fb/vesa.c ============================================================================== --- head/sys/dev/fb/vesa.c Wed Sep 23 00:31:08 2009 (r197423) +++ head/sys/dev/fb/vesa.c Wed Sep 23 02:45:02 2009 (r197424) @@ -221,6 +221,7 @@ int10_set_mode(int mode) { x86regs_t regs; + bzero(®s, sizeof(regs)); regs.R_EAX = 0x0000 | mode; x86biosCall(®s, 0x10); @@ -236,6 +237,7 @@ vesa_bios_get_mode(int mode, struct vesa int offs; u_char *buf; + bzero(®s, sizeof(regs)); regs.R_EAX = 0x4f01; regs.R_ECX = mode; @@ -263,6 +265,7 @@ vesa_bios_set_mode(int mode) { x86regs_t regs; + bzero(®s, sizeof(regs)); regs.R_EAX = 0x4f02; regs.R_EBX = mode; @@ -276,6 +279,7 @@ vesa_bios_get_dac(void) { x86regs_t regs; + bzero(®s, sizeof(regs)); regs.R_EAX = 0x4f08; regs.R_EBX = 1; @@ -292,6 +296,7 @@ vesa_bios_set_dac(int bits) { x86regs_t regs; + bzero(®s, sizeof(regs)); regs.R_EAX = 0x4f08; regs.R_EBX = (bits << 8); @@ -311,6 +316,7 @@ vesa_bios_save_palette(int start, int co u_char *p; int i; + bzero(®s, sizeof(regs)); regs.R_EAX = 0x4f09; regs.R_EBX = 1; regs.R_ECX = colors; @@ -349,6 +355,7 @@ vesa_bios_save_palette2(int start, int c u_char *p; int i; + bzero(®s, sizeof(regs)); regs.R_EAX = 0x4f09; regs.R_EBX = 1; regs.R_ECX = colors; @@ -396,6 +403,7 @@ vesa_bios_load_palette(int start, int co p[i*4 + 3] = 0; } + bzero(®s, sizeof(regs)); regs.R_EAX = 0x4f09; regs.R_EBX = 0; regs.R_ECX = colors; @@ -431,6 +439,7 @@ vesa_bios_load_palette2(int start, int c p[i*4 + 3] = 0; } + bzero(®s, sizeof(regs)); regs.R_EAX = 0x4f09; regs.R_EBX = 0; regs.R_ECX = colors; @@ -452,6 +461,7 @@ vesa_bios_state_buf_size(void) { x86regs_t regs; + bzero(®s, sizeof(regs)); regs.R_EAX = 0x4f04; regs.R_ECX = STATE_ALL; regs.R_EDX = STATE_SIZE; @@ -474,6 +484,7 @@ vesa_bios_save_restore(int code, void *p if (size > VESA_BIOS_BUFSIZE) return (1); + bzero(®s, sizeof(regs)); regs.R_EAX = 0x4f04; regs.R_ECX = STATE_ALL; regs.R_EDX = code; @@ -499,6 +510,7 @@ vesa_bios_get_line_length(void) { x86regs_t regs; + bzero(®s, sizeof(regs)); regs.R_EAX = 0x4f06; regs.R_EBX = 1; @@ -515,6 +527,7 @@ vesa_bios_set_line_length(int pixel, int { x86regs_t regs; + bzero(®s, sizeof(regs)); regs.R_EAX = 0x4f06; regs.R_EBX = 0; regs.R_ECX = pixel; @@ -541,6 +554,7 @@ vesa_bios_get_start(int *x, int *y) { x86regs_t regs; + bzero(®s, sizeof(regs)); regs.R_EAX = 0x4f07; regs.R_EBX = 1; @@ -561,6 +575,7 @@ vesa_bios_set_start(int x, int y) { x86regs_t regs; + bzero(®s, sizeof(regs)); regs.R_EAX = 0x4f07; regs.R_EBX = 0x80; regs.R_EDX = y; @@ -662,6 +677,7 @@ vesa_bios_init(void) vmbuf = (u_char *)x86biosAlloc(1, &offs); bcopy("VBE2", vmbuf, 4); /* try for VBE2 data */ + bzero(®s, sizeof(regs)); regs.R_EAX = 0x4f00; regs.R_ES = SEG_ADDR(offs); regs.R_DI = SEG_OFF(offs); @@ -1262,6 +1278,7 @@ vesa_get_origin(video_adapter_t *adp, of { x86regs_t regs; + bzero(®s, sizeof(regs)); regs.R_EAX = 0x4f05; regs.R_EBX = 0x10; @@ -1296,6 +1313,7 @@ vesa_set_origin(video_adapter_t *adp, of if (adp->va_window_gran == 0) return 1; + bzero(®s, sizeof(regs)); regs.R_EAX = 0x4f05; regs.R_EBX = 0; regs.R_EDX = offset / adp->va_window_gran; @@ -1304,6 +1322,7 @@ vesa_set_origin(video_adapter_t *adp, of if ((regs.R_AX & 0xff) != 0x4f) return 1; + bzero(®s, sizeof(regs)); regs.R_EAX = 0x4f05; regs.R_EBX = 1; regs.R_EDX = offset / adp->va_window_gran;