From owner-p4-projects@FreeBSD.ORG Tue Apr 22 21:52:40 2008 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 4A00D1065670; Tue, 22 Apr 2008 21:52:40 +0000 (UTC) Delivered-To: perforce@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 0C6F6106566B for ; Tue, 22 Apr 2008 21:52:40 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 050AA8FC14 for ; Tue, 22 Apr 2008 21:52:40 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.1/8.14.1) with ESMTP id m3MLqdQW011978 for ; Tue, 22 Apr 2008 21:52:39 GMT (envelope-from gonzo@FreeBSD.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.14.1/8.14.1/Submit) id m3MLqdut011976 for perforce@freebsd.org; Tue, 22 Apr 2008 21:52:39 GMT (envelope-from gonzo@FreeBSD.org) Date: Tue, 22 Apr 2008 21:52:39 GMT Message-Id: <200804222152.m3MLqdut011976@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to gonzo@FreeBSD.org using -f From: Oleksandr Tymoshenko To: Perforce Change Reviews Cc: Subject: PERFORCE change 140428 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 22 Apr 2008 21:52:40 -0000 http://perforce.freebsd.org/chv.cgi?CH=140428 Change 140428 by gonzo@gonzo_jeeves on 2008/04/22 21:51:57 o Use intr_event_handle instead of handmade loop o Add new parameter (irq) to intr_event_create call o Merge patch submitted by Zhao, Ning a while ago (obtained from NetBSD): fixes messes with PIC_OCW1/PIC_OCW3 Affected files ... .. //depot/projects/mips2-jnpr/src/sys/mips/mips32/malta/gt_pci.c#5 edit Differences ... ==== //depot/projects/mips2-jnpr/src/sys/mips/mips32/malta/gt_pci.c#5 (text+ko) ==== @@ -142,17 +142,14 @@ { struct gt_pci_softc *sc = v; struct intr_event *event; - struct intr_handler *ih; - int irq, thread; + int irq; for (;;) { bus_space_write_1(sc->sc_pciio, sc->sc_ioh_icu1, PIC_OCW3, OCW3_SEL | OCW3_P); irq = bus_space_read_1(sc->sc_pciio, sc->sc_ioh_icu1, PIC_OCW3); if ((irq & OCW3_POLL_PENDING) == 0) - { return FILTER_HANDLED; - } irq = OCW3_POLL_IRQ(irq); @@ -168,22 +165,14 @@ } event = sc->sc_eventstab[irq]; - thread = 0; - if (event && !TAILQ_EMPTY(&event->ie_handlers)) - { - /* Execute fast handlers. */ - TAILQ_FOREACH(ih, &event->ie_handlers, ih_next) { - if (ih->ih_filter == NULL) - thread = 1; - else - ih->ih_filter(ih->ih_argument); - } + if (!event || TAILQ_EMPTY(&event->ie_handlers)) { + printf("gt_pci: stray interrupt %d\n", irq); + continue; } - /* Schedule thread if needed. */ - if (thread) - intr_event_schedule_thread(event); + if (intr_event_handle(event, NULL) != 0) + printf("gt_pci: stray interrupt %d\n", irq); /* Send a specific EOI to the 8259. */ if (irq > 7) { @@ -285,15 +274,15 @@ ICW4_8086); /* mask all interrupts */ - bus_space_write_1(sc->sc_pciio, sc->sc_ioh_icu1, 0, + bus_space_write_1(sc->sc_pciio, sc->sc_ioh_icu1, 1, sc->sc_imask & 0xff); /* enable special mask mode */ - bus_space_write_1(sc->sc_pciio, sc->sc_ioh_icu1, 1, + bus_space_write_1(sc->sc_pciio, sc->sc_ioh_icu1, 0, OCW3_SEL | OCW3_ESMM | OCW3_SMM); /* read IRR by default */ - bus_space_write_1(sc->sc_pciio, sc->sc_ioh_icu1, 1, + bus_space_write_1(sc->sc_pciio, sc->sc_ioh_icu1, 0, OCW3_SEL | OCW3_RR); /* reset, program device, 4 bytes */ @@ -307,15 +296,15 @@ ICW4_8086); /* mask all interrupts */ - bus_space_write_1(sc->sc_pciio, sc->sc_ioh_icu2, 0, + bus_space_write_1(sc->sc_pciio, sc->sc_ioh_icu2, 1, sc->sc_imask & 0xff); /* enable special mask mode */ - bus_space_write_1(sc->sc_pciio, sc->sc_ioh_icu2, 1, + bus_space_write_1(sc->sc_pciio, sc->sc_ioh_icu2, 0, OCW3_SEL | OCW3_ESMM | OCW3_SMM); /* read IRR by default */ - bus_space_write_1(sc->sc_pciio, sc->sc_ioh_icu2, 1, + bus_space_write_1(sc->sc_pciio, sc->sc_ioh_icu2, 0, OCW3_SEL | OCW3_RR); /* @@ -657,9 +646,9 @@ event = sc->sc_eventstab[irq]; if (event == NULL) { - error = intr_event_create(&event, (void *)irq, 0, + error = intr_event_create(&event, (void *)irq, 0, irq, (mask_fn)mips_mask_irq, (mask_fn)mips_unmask_irq, - (mask_fn)mips_unmask_irq, NULL, "gt_pci intr%d:", irq); + NULL, NULL, "gt_pci intr%d:", irq); if (error) return 0; sc->sc_eventstab[irq] = event;