From owner-svn-src-head@FreeBSD.ORG Sun Apr 28 06:15:57 2013 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 1AA26174; Sun, 28 Apr 2013 06:15:57 +0000 (UTC) (envelope-from joel@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) by mx1.freebsd.org (Postfix) with ESMTP id E75241AE2; Sun, 28 Apr 2013 06:15:56 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.6/8.14.6) with ESMTP id r3S6Fui0057399; Sun, 28 Apr 2013 06:15:56 GMT (envelope-from joel@svn.freebsd.org) Received: (from joel@localhost) by svn.freebsd.org (8.14.6/8.14.5/Submit) id r3S6FuBT057398; Sun, 28 Apr 2013 06:15:56 GMT (envelope-from joel@svn.freebsd.org) Message-Id: <201304280615.r3S6FuBT057398@svn.freebsd.org> From: Joel Dahl Date: Sun, 28 Apr 2013 06:15:56 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r250014 - head/share/man/man4/man4.arm X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 28 Apr 2013 06:15:57 -0000 Author: joel (doc committer) Date: Sun Apr 28 06:15:56 2013 New Revision: 250014 URL: http://svnweb.freebsd.org/changeset/base/250014 Log: mdoc improvements Modified: head/share/man/man4/man4.arm/devcfg.4 Modified: head/share/man/man4/man4.arm/devcfg.4 ============================================================================== --- head/share/man/man4/man4.arm/devcfg.4 Sun Apr 28 03:13:45 2013 (r250013) +++ head/share/man/man4/man4.arm/devcfg.4 Sun Apr 28 06:15:56 2013 (r250014) @@ -37,7 +37,9 @@ The special file .Pa /dev/devcfg can be used to configure the PL (FPGA) section of the Xilinx Zynq-7000. .Pp -On the first write to the character device at file offset 0, the devcfg driver +On the first write to the character device at file offset 0, the +.Nm +driver asserts the top-level PL reset signals, disables the PS-PL level shifters, and clears the PL configuration. Write data is sent to the PCAP (processor configuration access port). @@ -54,16 +56,18 @@ The file should not be confused with the design tools. It is the binary form of the configuration bitstream. The Xilinx -.Pa promgen +.Ic promgen tool can do the conversion: .Bd -literal -offset indent promgen -b -w -p bin -data_width 32 -u 0 design.bit -o design.bit.bin .Ed .Sh SYSCTL VARIABLES -The devcfg driver provides the following +The +.Nm +driver provides the following .Xr sysctl 8 variables: -.Bl -tag -width 12 +.Bl -tag -width 4n .It Va hw.fpga.pl_done .Pp This variable always reflects the status of the PL's DONE signal. @@ -73,15 +77,19 @@ A 1 means the PL section has been proper This variable controls if the PS-PL level shifters are enabled after the PL section has been reconfigured. This variable is 1 by default but setting it to 0 allows the PL section to be -programmed with configurations that don't interface to the PS section of the +programmed with configurations that do not interface to the PS section of the part. Changing this value has no effect on the level shifters until the next device reconfiguration. +.El .Sh FILES -/dev/devcfg Character device for +.Bl -tag -width 12n +.It Pa /dev/devcfg +Character device for the .Nm driver. -.Sh AUTHORS -Thomas Skibo +.El .Sh SEE ALSO Zynq-7000 SoC Technical Reference Manual (Xilinx doc UG585) +.Sh AUTHORS +Thomas Skibo