Skip site navigation (1)Skip section navigation (2)
Date:      Mon, 14 Nov 2011 16:06:52 -0500
From:      John Baldwin <jhb@freebsd.org>
To:        freebsd-acpi@freebsd.org
Cc:        John Veit <John_Veit@dell.com>, Don Croft <Don_Croft@dell.com>
Subject:   Re: Sandy Bridge Support for FBSD 8.1
Message-ID:  <201111141606.52981.jhb@freebsd.org>
In-Reply-To: <975552A94CBC0F4DA60ED7B36C949CBA03D08496A8@shandy.Beer.Town>
References:  <975552A94CBC0F4DA60ED7B36C949CBA03D08496A8@shandy.Beer.Town>

next in thread | previous in thread | raw e-mail | index | archive | help
On Monday, November 14, 2011 9:50:14 am John Veit wrote:
> Motherboard: Dell R720 with 2 SandyBridge X6 CPU's
> I do not see some devices on the second CPU slot (e.g. the Integrated Memory 
Controller devices @ bus(127):slot(15):fn(0)). I do see the IMC devices on the 
first CPU Slot (bus(63):slot(15):fn(0)), however.
> 
> Please advise.
> Thanks, John Veit
> jveit@dell.com

Eh.  How are you seeing those devices in the first place?  My understanding is 
that these devices showed up on busses starting with bus 255 on down.  This is 
managed by the qpi driver in sys/x86/pci/qpi.c.  Hmm, it doesn't see any 
devices on my SB desktop machine here.  Ah.  It does a CPU ID check that needs
to be updated.  However, are the buses defined to be 127 and 63 rather than 
255 and 254 as they were on Nehalem/Westmere?  Is there formal documentation 
you can point me at (from Intel perhaps?) that explains the official method 
for discovering these PCI buses?

-- 
John Baldwin



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201111141606.52981.jhb>