Date: Sat, 22 Dec 2001 12:10:50 GMT From: yorickhardy@yahoo.com To: freebsd-hackers@freebsd.org Subject: patch for sb live record channel dead Message-ID: <200112221210.fBMCAo601226@Yorick.>
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This patch should fix the pcm0 recording channel dead error for the
sb live. This is my first patch, so I hope it applies correctly.
The patch is against stable, I do not believe it will work for current
but I might be able to fix this also if the problem is present in
current.
(the patch can be applied from /usr/src as the current directory.)
Yorick Hardy.
*** /home/yorick/FreeBSD/ctm/src/sys/dev/sound/pci/emu10k1.c Wed Aug 1 23:32:24 2001
--- sys/dev/sound/pci/emu10k1.c Tue Dec 21 11:01:14 1999
***************
*** 146,154 ****
};
static struct pcmchan_caps emu_reccaps[3] = {
- {8000, 48000, emu_rfmt_ac97, 0},
- {8000, 8000, emu_rfmt_mic, 0},
{48000, 48000, emu_rfmt_efx, 0},
};
static u_int32_t emu_pfmt[] = {
--- 146,154 ----
};
static struct pcmchan_caps emu_reccaps[3] = {
{48000, 48000, emu_rfmt_efx, 0},
+ {8000, 8000, emu_rfmt_mic, 0},
+ {8000, 48000, emu_rfmt_ac97, 0},
};
static u_int32_t emu_pfmt[] = {
***************
*** 765,771 ****
ch->spd = 8000;
ch->num = sc->rnum;
switch(sc->rnum) {
! case 0:
ch->idxreg = ADCIDX;
ch->basereg = ADCBA;
ch->sizereg = ADCBS;
--- 765,771 ----
ch->spd = 8000;
ch->num = sc->rnum;
switch(sc->rnum) {
! case 2:
ch->idxreg = ADCIDX;
ch->basereg = ADCBA;
ch->sizereg = ADCBS;
***************
*** 781,787 ****
ch->irqmask = INTE_MICBUFENABLE;
break;
! case 2:
ch->idxreg = FXIDX;
ch->basereg = FXBA;
ch->sizereg = FXBS;
--- 781,787 ----
ch->irqmask = INTE_MICBUFENABLE;
break;
! case 0:
ch->idxreg = FXIDX;
ch->basereg = FXBA;
ch->sizereg = FXBS;
***************
*** 815,825 ****
{
struct sc_rchinfo *ch = data;
! if (ch->num == 0)
speed = adcspeed[emu_recval(speed)];
if (ch->num == 1)
speed = 8000;
! if (ch->num == 2)
speed = 48000;
ch->spd = speed;
return ch->spd;
--- 815,825 ----
{
struct sc_rchinfo *ch = data;
! if (ch->num == 2)
speed = adcspeed[emu_recval(speed)];
if (ch->num == 1)
speed = 8000;
! if (ch->num == 0)
speed = 48000;
ch->spd = speed;
return ch->spd;
***************
*** 854,860 ****
case PCMTRIG_START:
ch->run = 1;
emu_wrptr(sc, 0, ch->sizereg, ADCBS_BUFSIZE_4096);
! if (ch->num == 0) {
val = ADCCR_LCHANENABLE;
if (ch->fmt & AFMT_STEREO)
val |= ADCCR_RCHANENABLE;
--- 854,860 ----
case PCMTRIG_START:
ch->run = 1;
emu_wrptr(sc, 0, ch->sizereg, ADCBS_BUFSIZE_4096);
! if (ch->num == 2) {
val = ADCCR_LCHANENABLE;
if (ch->fmt & AFMT_STEREO)
val |= ADCCR_RCHANENABLE;
***************
*** 939,946 ****
if (stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) {
ack |= stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL);
! if (sc->rch[0].channel)
! chn_intr(sc->rch[0].channel);
}
if (stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL)) {
ack |= stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL);
--- 939,946 ----
if (stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL)) {
ack |= stat & (IPR_ADCBUFFULL | IPR_ADCBUFHALFFULL);
! if (sc->rch[2].channel)
! chn_intr(sc->rch[2].channel);
}
if (stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL)) {
ack |= stat & (IPR_MICBUFFULL | IPR_MICBUFHALFFULL);
***************
*** 949,956 ****
}
if (stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) {
ack |= stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL);
! if (sc->rch[2].channel)
! chn_intr(sc->rch[2].channel);
}
if (stat & IPR_PCIERROR) {
ack |= IPR_PCIERROR;
--- 949,956 ----
}
if (stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL)) {
ack |= stat & (IPR_EFXBUFFULL | IPR_EFXBUFHALFFULL);
! if (sc->rch[0].channel)
! chn_intr(sc->rch[0].channel);
}
if (stat & IPR_PCIERROR) {
ack |= IPR_PCIERROR;
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