From owner-freebsd-arm@FreeBSD.ORG Mon Oct 6 04:58:53 2014 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 34395917 for ; Mon, 6 Oct 2014 04:58:53 +0000 (UTC) Received: from mail-yh0-x230.google.com (mail-yh0-x230.google.com [IPv6:2607:f8b0:4002:c01::230]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority G2" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id E4A3FBBE for ; Mon, 6 Oct 2014 04:58:52 +0000 (UTC) Received: by mail-yh0-f48.google.com with SMTP id v1so1709191yhn.7 for ; Sun, 05 Oct 2014 21:58:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type:content-transfer-encoding; bh=EIdgXZEL7Jxmo4CrM/A9TLrvrZnOQG0QOY0eJFAchQg=; b=L0kwGG+R1cj34EFoYEo9PqY7ViBBYq0pp2k9clxQ2l+1Ovo9mGu2tqpp46oAQ+/nBA eNlA3Afle/4m27P6qwaKBYf2F82Vf+cyapWsbON8dJWWwfMfpQMNUiJbZzMW9/OhS0Ez Q3FMVez1rR2qjbtA5whcS/oXJzgd+sPimf/OP56qXT9Ab+X32bN4nsUOSJUpclpcXe3U sJz0lCPD/kaf9ctbYJ36tcwo1y8WMEDTi0vl50Z0ehR6yvoug1VpeZ23oyxEU6kgp0A7 i3rOaSRRB1SsOD1X/kE3izhlnBw/zRxyN4q1gLPnYQfBSgYqJqDnDjNN9JxI08wRGn4H JoYg== MIME-Version: 1.0 X-Received: by 10.236.145.66 with SMTP id o42mr35145318yhj.74.1412571531898; Sun, 05 Oct 2014 21:58:51 -0700 (PDT) Received: by 10.170.186.141 with HTTP; Sun, 5 Oct 2014 21:58:51 -0700 (PDT) In-Reply-To: References: <27A69721-D93D-4D4C-883A-718CFFF52B21@bsdimp.com> Date: Sun, 5 Oct 2014 21:58:51 -0700 Message-ID: Subject: Re: Digi CCWMX53 From: Russell Haley To: Warner Losh Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Cc: freebsd-arm@freebsd.org, Rui Paulo X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: "Porting FreeBSD to ARM processors." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 06 Oct 2014 04:58:53 -0000 Alright, well night one of my crash course in C and it wasn't quite as painful as I thought. For shits and giggles I started looking in the /sys/dev/nand directory. Nand.h then led me to ../../sys/bus.h and then back to some nfc classes where, EUREKA, I found nfc_91.h/c. I have been reading up on the atmel board support package so I recognized the at91 moniker. (pretty pleased with myself for that one...) So what I can tell is someone needs to write a mx53/mx6 nand flash controller that works in roughly the same way as the at91 "prototype". It would implement various functions and then assign them using: static device_method_t at91_nand_methods[] =3D { DEVMETHOD(device_probe, at91_nand_probe), DEVMETHOD(device_attach, at91_nand_attach), DEVMETHOD(nfc_send_command, at91_nand_send_command), DEVMETHOD(nfc_send_address, at91_nand_send_address), DEVMETHOD(nfc_read_byte, at91_nand_read_byte), DEVMETHOD(nfc_read_buf, at91_nand_read_buf), DEVMETHOD(nfc_write_buf, at91_nand_write_buf), DEVMETHOD(nfc_select_cs, at91_nand_select_cs), DEVMETHOD(nfc_read_rnb, at91_nand_read_rnb), DEVMETHOD_END }; Or some rough order of magnitude in that direction? That would be where some of the "pre-canded jobs" mentioned in the spec would come in handy? Thanks, Russ On Sat, Oct 4, 2014 at 4:15 PM, Russell Haley wrote: > Warner, > That's great news! I had a scan and it seemed pretty thorough (albiet > from a novice point of view). The pre-canned jobs looked promising. > > As much as I'm hoping your intention is to fix this FOR me, could you > point me towards the code for the mtd support? > > Many thanks to everyone for helping. I've had more progress in the > last two weeks than I have in the previous six months. lolz > > Russ > > > On Sat, Oct 4, 2014 at 11:05 AM, Warner Losh wrote: >> Hey Russ, >> >> A quick read suggests all, or nearly all, of the data needed to write a = full NFC for this chip is present. The programming and read sequences and i= nformation about ECC error rates appear to be readily available. The exact = ECC used, however, appears opaque. This may or may not be a problem. It eve= n appears to have command sequencing built into the controller. This is a g= reat feature, but one the current code doesn=E2=80=99t make use of. >> >> Warner >> >> On Oct 2, 2014, at 10:44 PM, Russell Haley wrote: >> >>> Warner, >>> >>> I was looking for a Digi reference but it turns out the Nand Flash Cont= roller is part of the Freescale Processor. Here is the link to the Referenc= e Manual: >>> >>> cache.freescale.com/files/32bit/doc/ref_manual/iMX53RM.pdf >>> >>> The NAND Flash Controller is in Chapter 51 page 3571 to page 3647. >>> >>> Is this relevant to what you are looking at doing? https://wiki.freebsd= .org/NAND >>> >>> I also found something called CHFS for NetBSD that looks interesting: h= ttp://chewiefs.sed.hu/home >>> >>> Thanks, >>> Russ >>> >>> >>> >>> >>> >>> >>> >>> On Thu, Oct 2, 2014 at 2:34 PM, Warner Losh wrote: >>> >>> On Oct 1, 2014, at 12:48 AM, Russell Haley wrote= : >>> >>> > Warner, >>> > >>> > First, I was just watching your 2010 talk on supporting FreeBSD in a = commercial environment. Has there been any updates in the process of mainta= ining a commercial branch in the last 4 years (not that I have any commerci= al ventures yet! lolz)? >>> > >>> > Anyway, I talked to an Engineer about the NAND controller spec and he= chided me for being naive (poor little software developer, in way over his= head. tisk tisk). He mentioned a FIVE THOUSAND page reference manual, whic= h I have yet to find on the Digi site. >>> >>> URL + section number. 5k pages doesn=E2=80=99t necessarily mean it will= be useful, though. :( >>> >>> > I have however found this hardware reference: >>> > >>> > http://ftp1.digi.com/support/documentation/90001270_E.pdf >>> > >>> > From Page 41: >>> > >>> > NAND flash memory >>> > The ConnectCore for i.MX53 module provides 8GB of NAND flash memory. = On the module in >>> > the development kits a 512MByte, 2Kbyte page, NAND flash chip is used= . This NAND flash >>> > device is connected to NAND flash Chip Select 0. >>> > The NAND flash controller signals are available on the module connect= ors. >>> >>> This basically says nothing more useful than =E2=80=9CThere=E2=80=99s N= AND on this board that=E2=80=99s 4Gbits on CS0.=E2=80=9D which is useful, b= ut far from sufficient. How do I program the DMA so that ECC is added to th= e OOB areas of that NAND? How do I set different ECC tables? How do I do EC= C error correction and detection? If you can=E2=80=99t answer that sort of = question from the docs you have, then they aren=E2=80=99t helpful enough. >>> >>> > There are pin references to NAND further down in the section "GPIO mu= ltiplexing table in the ConnectCore for i.MX53 module" on page 44 and 49. >>> > >>> > I fear this is not the information we are looking for. >>> >>> Not really. The GPIO info might be mildly helpful in a few cases >>> >>> > I have found another u-boot fork for the CCWMX53 on github here: http= s://github.com/Varcain/uboot-ccwmx53-digi >>> > >>> > With what seems to be the information about booting from NAND here: h= ttps://github.com/Varcain/uboot-ccwmx53-digi/tree/master/nand_spl >>> > >>> > If you can let me know what I am looking for I can both ask a more di= rected question at work and also perform a better search. >>> > >>> > I have also started looking over the Architecture handbook as well be= cause I have a feeling there is going to be lots of driver code in my futur= e. >>> >>> A good first step would be to get a URL or search string to get the URL= for that big spec. It is of the right size to possibly be useful, but some= times really long specs have 1-2 page descriptions of things like the SD co= ntroller or the NAND controller that you need special NDAs + business arran= gements to get, so it is hard to say=E2=80=A6 >>> >>> Warner >>> >>> > >>> > On Sun, Sep 28, 2014 at 12:12 AM, Warner Losh wrote: >>> > >>> > On Sep 27, 2014, at 9:49 PM, Russell Haley wro= te: >>> > >>> > > I will attempt to load the kernel from tftp as soon as I can. I wil= l need >>> > > to figure out how to get ethernet to the unit. >>> > > >>> > > I know nothing about u-boot so forgive my ignorance but I was hopin= g to >>> > > modify the Arndale configuration to work such as: >>> > > >>> > > # mmc read 1 0x70800000 0x800 0x1800; >>> > > #go 0x70800000; >>> > > >>> > > and then point the rootfs to /dev/da1s1 >>> > > >>> > > On another note, do you know where I could find out more about the = missing >>> > > MTD support? >>> > >>> > A spec for the NAND controller is needed to make that work=E2=80=A6 = Is one about? >>> > >>> > Warner >>> > >>> > >>> > > BTW, I thought your wireless mesh stuff was pretty cool. Ah, so man= y cool >>> > > projects, so little time... >>> > > >>> > > Thanks, >>> > > >>> > > Russ >>> > > >>> > > On Sat, Sep 27, 2014 at 2:35 PM, Rui Paulo wrote: >>> > > >>> > >> On Sep 27, 2014, at 13:31, Russell Haley wr= ote: >>> > >>> >>> > >>> Rui, >>> > >>> >>> > >>> So no MTD means the NAND on the SOM is out, but can I boot the ke= rnel >>> > >> and load rootfs from the microSD, like in this example: >>> > >>> =E2=80=A2 >>> > >>> ARNDALE5250 # setenv bootcmd "fatload mmc 0:1 0x40f00000 kernel.b= in; go >>> > >> 0x40f00000" >>> > >>> >>> > >>> ARNDALE5250 # saveenv >>> > >>> >>> > >>> ARNDALE5250 # boot >>> > >> >>> > >> You can't use the Arndale config since the load addresses are diff= erent. >>> > >> You should be able to load a kernel from the network. Can you do = that? >>> > >> >>> > >> -- >>> > >> Rui Paulo >>> > >> >>> > >> >>> > >> >>> > >> >>> > > _______________________________________________ >>> > > freebsd-arm@freebsd.org mailing list >>> > > http://lists.freebsd.org/mailman/listinfo/freebsd-arm >>> > > To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.o= rg" >>> > >>> > >>> >>> >>