From owner-freebsd-performance@FreeBSD.ORG Fri Oct 13 18:49:09 2006 Return-Path: X-Original-To: freebsd-performance@FreeBSD.ORG Delivered-To: freebsd-performance@FreeBSD.ORG Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 896A616A407 for ; Fri, 13 Oct 2006 18:49:09 +0000 (UTC) (envelope-from cswiger@mac.com) Received: from smtpout.mac.com (smtpout.mac.com [17.250.248.171]) by mx1.FreeBSD.org (Postfix) with ESMTP id 1DFE043D68 for ; Fri, 13 Oct 2006 18:49:08 +0000 (GMT) (envelope-from cswiger@mac.com) Received: from mac.com (smtpin05-en2 [10.13.10.150]) by smtpout.mac.com (Xserve/8.12.11/smtpout01/MantshX 4.0) with ESMTP id k9DIn7Mh010451; Fri, 13 Oct 2006 11:49:07 -0700 (PDT) Received: from [17.214.13.96] (a17-214-13-96.apple.com [17.214.13.96]) (authenticated bits=0) by mac.com (Xserve/smtpin05/MantshX 4.0) with ESMTP id k9DIn5Yr023019; Fri, 13 Oct 2006 11:49:06 -0700 (PDT) In-Reply-To: References: <3731.71.56.92.181.1160009571.squirrel@www.stelesys.com> <200610120925.k9C9PmUK048690@lurza.secnetix.de> <20061012205342.GA62241@xor.obsecurity.org> Mime-Version: 1.0 (Apple Message framework v752.2) Content-Type: text/plain; charset=US-ASCII; delsp=yes; format=flowed Message-Id: <9500A2C9-07EB-4EEA-9477-9E6B4BFEB437@mac.com> Content-Transfer-Encoding: 7bit From: Chuck Swiger Date: Fri, 13 Oct 2006 11:49:04 -0700 To: Eric Hodel X-Mailer: Apple Mail (2.752.2) X-Brightmail-Tracker: AAAAAA== X-Brightmail-scanned: yes Cc: freebsd-performance@FreeBSD.ORG, Kris Kennaway Subject: Re: Help with improving mysql performance on 6.2PRE X-BeenThere: freebsd-performance@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Performance/tuning List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 13 Oct 2006 18:49:09 -0000 On Oct 13, 2006, at 11:26 AM, Eric Hodel wrote: >>> Or did that change recently? >> >> It's only on certain systems, apparently. > > Is there a list of systems where it is safe to use the TSC with > SMP? Or some script we can run? The problem of the TSC clocks getting out of sync affects pretty much all AMD X2 dual-core CPUs, as well as the older 32-bit Althon MP CPUs; the Intel Xeon and Core Duo CPUs seem to do a lot better, although older Intel CPUs have also been reported to show problems with the TSC. Disabling the fancy power-management capabilities (SpeedStep, PowerNow, Cool-n-quiet) to prevent the system from adjusting the CPU clock frequencies seems to reduce the extent of the problem. However, if you want your system clock to work reliably, using the ACPI-safe or i8254 timecounters is going to do much better than using the faster-but-unreliable TSC method. -- -Chuck