From owner-freebsd-arm@freebsd.org Thu Jul 6 21:40:21 2017 Return-Path: Delivered-To: freebsd-arm@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id B4FDFD927B2 for ; Thu, 6 Jul 2017 21:40:21 +0000 (UTC) (envelope-from rj@obsigna.com) Received: from mo6-p00-ob.smtp.rzone.de (mo6-p00-ob.smtp.rzone.de [IPv6:2a01:238:20a:202:5300::9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "*.smtp.rzone.de", Issuer "TeleSec ServerPass DE-2" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 46A3D806C7 for ; Thu, 6 Jul 2017 21:40:20 +0000 (UTC) (envelope-from rj@obsigna.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; t=1499377218; l=4555; s=domk; d=obsigna.com; h=To:References:Content-Transfer-Encoding:Cc:Date:In-Reply-To:From: Subject:Mime-Version:Content-Type; bh=JMpSsc2iRiGCaNi4Xx9PwOw6ckCmWNk/2xsvtN20wRI=; b=o9bBUy76yQJw9FU6xL4vuSOjVXxXe5g7CxXG6mn0q7Tz5aL3qBFqjrdPLAPV6jH+eX 3vjr0EnzYqoc2pc5zckz/UqGHeV27bNTwpEuTjqh6KYZ/h9Bc49Nud1cLDKfs8IJGBj2 0dVluZ8eHhi1TzXJ09Zrl0diO6N789YJB2tws= X-RZG-AUTH: :O2kGeEG7b/pS1EK7WHa0hxqKZr4lnx6UhT0M0o35iAdWtoM07Gt3wQHFGhIl99Xr7A== X-RZG-CLASS-ID: mo00 Received: from mail.obsigna.com (bb02b03a.virtua.com.br [187.2.176.58]) by smtp.strato.de (RZmta 41.1 DYNA|AUTH) with ESMTPSA id I08966t66LeHPbZ (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (curve secp521r1 with 521 ECDH bits, eq. 15360 bits RSA)) (Client did not present a certificate); Thu, 6 Jul 2017 23:40:17 +0200 (CEST) Received: from rolf.projectworld.net (rolf.projectworld.net [192.168.222.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.obsigna.com (Postfix) with ESMTPSA id EF307292D701; Thu, 6 Jul 2017 18:40:13 -0300 (BRT) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 10.3 \(3273\)) Subject: Re: Enabling ADC on a Beaglebone Black running FreeBSD 12.0-CURRENT (BEAGLEBONE) From: "Dr. Rolf Jansen" In-Reply-To: <79EE9798-BCF0-4585-93F5-4E604142561F@obsigna.com> Date: Thu, 6 Jul 2017 18:40:13 -0300 Content-Transfer-Encoding: quoted-printable Message-Id: <6DE3312D-BA5B-4192-88C4-1F0C800CBFF6@obsigna.com> References: <0C4DCBB9-2642-4B0F-B15B-4139D5D8B249@obsigna.com> <271AFD8F-BD2C-445C-AB95-D7D07593E487@obsigna.com> <5D2FEB0D-64F3-488C-8458-85E7DF10EFB7@obsigna.com> <20170330202858.GA22253@bluezbox.com> <79EE9798-BCF0-4585-93F5-4E604142561F@obsigna.com> To: freebsd-arm@FreeBSD.org X-Mailer: Apple Mail (2.3273) X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: "Porting FreeBSD to ARM processors." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 06 Jul 2017 21:40:21 -0000 > Am 30.03.2017 um 18:11 schrieb Dr. Rolf Jansen : >=20 > Am 30.03.2017 um 17:28 schrieb Oleksandr Tymoshenko = : >> Dr. Rolf Jansen (rj@obsigna.com) wrote: >>> Today I updated once again my Beaglebone Black by >>> merging-in the latest FreeBSD 12.0-CURRENT (BEAGLEBONE) >>> snapshot, and once again I enabled the ADCs on the >>> Beaglebone in the device tree blob am335x-boneblack.dtb, >>> and the ADC is still working fine. >>>=20 >>> Even if it is not that a big hassle to modify the device >>> tree blob, I am curious on why the ADC has been disabled >>> in the blob in the first place, end even more, given the >>> fact that the device ti_adc driver is built-in to kernel >>> and once enabled, the ADC is functional. >>>=20 >>> Didn't it work at some time in the past? Now it is. >>>=20 >>> What is missing to activate the ADC in the device tree >>> blob by default? >>=20 >> Few months ago FreeBSD switched to using upstream DTB files >> instead of custom-made ones. For some reason ADC is disabled >> in upstream. If you're running recent FreeBSD you can use >> dtb overlays to enable ADC without hassle of maintaining >> custom dts file. You can do following: >>=20 >> 1. Create am335x-beaglebone-tscadc.dts with following >> content: >>=20 >> /dts-v1/; >> /plugin/; >>=20 >> / { >> compatible =3D "ti,am335x-bone-green", "ti,am335x-bone-black", = "ti,am335x-bone", "ti,am33xx"; >>=20 >> fragment@0 { >> target =3D <&tscadc>; >> __overlay__ { >> status =3D "okay"; >> adc { >> ti,adc-channels =3D <0 1 2 3 4 5 6>; >> }; >> }; >> }; >> }; >>=20 >> 2. Compile overlay: >> $ dtc -I dts -O dtb -o am335x-beaglebone-tscadc.dtbo = am335x-beaglebone-tscadc.dts >>=20 >> 3. Copy it to /boot/dtb/ directory on your BBB >>=20 >> 4. Enable overlay in /boot/loader.conf by adding following line: >>=20 >> fdt_overlays=3D"am335x-beaglebone-tscadc.dtbo" >=20 >=20 > Oleksandr, thank you very much for drawing my attention to the dtb = overlay facility. >=20 > I created and enabled the adc-dtb-overlay file as you explained above, = and it works. >=20 > Best regards >=20 > Rolf With the last two 12.0-CURRENT BBB snapshots (r320360 and r320599), the = dtb oberlay facility is broken. I can get the above overlay working only = if I compile it with the dtc tool from the previous June, 19th snapshot = (r320095), and in addition it is necessary to re-add the phandle to the = tscadc@44e0d000 definitions of the base dtb file. Said phandle was = removed together with almost all phandles of other device definitions = between r320095 and r320360. Since I need to edit the base dtb anyway, for the time being, I enable = the ADC and its channels right in there. This one can be compiled with = the new dtc, and in addition the ADC phandle is not necessary. By the way, the decompiler of the new dtc commes with a formatting = glitch. The sections are no more devided by an empty line, instead an = empty line is introduced below the section headers -- this looks spoiled = somehow. Anyway, here are my working changes:=20 --- am335x-boneblack.dts.orig 2017-07-06 18:32:10.321019000 -0300 +++ am335x-boneblack.dts 2017-07-06 16:00:22.255994000 -0300 @@ -1711,7 +1711,7 @@ interrupt-parent =3D <0x1>; interrupts =3D <0x10>; ti,hwmods =3D "adc_tsc"; - status =3D "disabled"; + status =3D "okay"; dmas =3D <0x29 0x35 0x0 0x29 0x39 0x0>; dma-names =3D "fifo0", "fifo1"; tsc { @@ -1722,8 +1722,19 @@ =20 #io-channel-cells =3D <0x1>; compatible =3D "ti,am3359-adc"; + ti,adc-channels =3D <0 1 2 3 4 5 6 7>; }; }; + pruss@4A300000 { + + compatible =3D "ti,pruss-v2"; + ti,deassert-hard-reset =3D "pruss", "pruss"; + reg =3D <0x4a300000 0x80000>; + ti,pintc-offset =3D <0x20000>; + interrupt-parent =3D <0x1>; + interrupts =3D <0x14 0x15 0x16 0x17 0x18 0x19 = 0x1A 0x1B>; + status =3D "okay"; + }; gpmc@50000000 { =20 compatible =3D "ti,am3352-gpmc"; @@ -1969,6 +1980,7 @@ ehrpwm2_tbclk =3D = "/ocp/l4_wkup@44c00000/scm@210000/scm_conf@0/clocks/ehrpwm2_tbclk@44e10664= "; ehrpwm0_tbclk =3D = "/ocp/l4_wkup@44c00000/scm@210000/scm_conf@0/clocks/ehrpwm0_tbclk@44e10664= "; tscadc =3D "/ocp/tscadc@44e0d000"; + pruss =3D "/ocp/pruss@4A300000"; clkout2_pin =3D = "/ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_clkout2_pin"; aes0_fck =3D = "/ocp/l4_wkup@44c00000/scm@210000/scm_conf@0/clocks/aes0_fck"; gpio3_dbclk =3D = "/ocp/l4_wkup@44c00000/prcm@200000/clocks/gpio3_dbclk@b4";